IP Library Granted Patent US 7,787,313
Granted Patent B2
US 7,787,313 · App. 12/057,203 · Granted Aug 31, 2010

Bitline voltage driver

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Quick Facts
Patent No.
US 7,787,313
App. No.
12/057,203
Granted
Aug 31, 2010
Kind
B2
Abstract

A method and structure for passing a bitline voltage regardless of its voltage level via a bitline in a memory device is disclosed. In one embodiment, the method includes detecting the bitline voltage of the bitline, feeding a control signal at an activation voltage level to the bitline pass device to maintain a pass voltage differential of the bitline pass device when the bitline is selected and passing the bitline voltage via the bitline pass device in response to the control signal, where the pass voltage differential is greater than a threshold voltage of the bitline pass device regardless of a level of the bitline voltage.

Claims (32)

1. A bitline voltage system, comprising:

a bitline pass device for passing a bitline voltage via a bitline; and

a voltage control module to control the bitline pass device,

wherein the control comprises maintaining a pass voltage differential that enables the bitline pass device to pass the bitline voltage when the bitline is selected; and

wherein the pass voltage differential is greater than a threshold voltage of the bitline pass device regardless of a level of the bitline voltage which is limited by a breakdown voltage of the bitline pass device.

2. The system of claim 1 , wherein the voltage control module is a variable voltage control module for forwarding a control signal in response to various voltage levels in the bitline voltage.

3. The system of claim 1 , wherein the pass voltage differential is less than a positive supply voltage (V cc ) of the memory device minus the threshold voltage.

4. The system of claim 1 , wherein the bitline pass device is coupled between a node at the bitline voltage and a memory cell node.

5. The system of claim 1 , wherein the bitline pass device comprises a pass transistor.

6. The system of claim 1 , wherein the bitline voltage comprises a voltage greater than a positive supply voltage (Vcc) subtracted by the pass voltage differential.

7. The system of claim 1 , wherein the voltage control module comprises a voltage level adjuster for forwarding a control signal for controlling the bitline pass device.

8. The system of claim 7 , wherein the voltage level adjuster is shared by at least one additional bitline of a memory device comprising the bitline.

9. The system of claim 7 , wherein the voltage control module further comprises a logic circuit to select a voltage level of the control signal based on at least one bitline control signal.

10. The system of claim 7 , wherein the variable voltage control module further comprises an inverter coupled between the voltage level adjuster and the bitline pass device.

11. The system of claim 9 , wherein the variable voltage control module further comprises an intrinsic device coupled between the voltage level adjuster and the inverter.

12. The system of claim 10 , wherein the intrinsic device is controlled by at least one of a zero threshold transistor and another intrinsic device.

13. A voltage bitline control module in a memory device, comprising:

a voltage level adjuster for forwarding a control signal to control a bitline pass device; and

a bitline select module to select a voltage level of the control signal,

wherein the control signal is at an activation voltage level that maintains a pass voltage differential regardless of a bitline voltage level when a bitline associated with the bitline pass device is selected and the control signal is at a deactivation voltage level that turns off the bitline pass device when the bitline is not selected; and

wherein the bitline voltage is limited by a breakdown voltage of the bitline pass device.

14. The control module of claim 13 , wherein the voltage level of the control signal is determined based on at least one of the bitline voltage, a threshold voltage of the bitline pass device, a positive supply voltage (V cc ) and at least one bitline control signal of the memory device.

15. The control module of claim 14 , wherein the bitline select module comprises a logic circuit to select between the activation voltage level and the deactivation voltage level based on the at least one bitline control signal.

16. The control module of claim 13 , wherein the voltage level of the control signal is configured in response to a voltage level configuration signal.

17. The control module of claim 13 , wherein the voltage level adjuster is a voltage level shifter, a multiplexer or a voltage divider.

18. A bitline voltage pass method, comprising:

detecting a bitline voltage of a bitline with a bitline pass device;

feeding a control signal at an activation voltage level to a bitline pass device to maintain a pass voltage differential of the bitline pass device when the bitline is selected; and

passing the bitline voltage via the bitline pass device in response to the control signal,

wherein the pass voltage differential is greater than a threshold voltage of the bitline pass device regardless of a level of the bitline voltage limited by a breakdown voltage of the bitline pass device.

19. The method of claim 18 , wherein the feeding the control signal further comprises selecting the activation voltage level based on the bitline voltage, the threshold voltage and a positive supply voltage (V cc ) of a memory device.

20. The method of claim 18 , further comprising feeding the control signal at a deactivation voltage level to the bitline pass device to turn off the bitline pass device, wherein the deactivation voltage level is based on the bitline voltage, the threshold voltage and a positive supply voltage (V cc ) of a memory device.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2022
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES LLC
Reel/Frame 059721/0467 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036042/0212 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2008
From: CHIA, CHIEU YIN; ACHTER, MICHAEL; KUO, HARRY; ANG, BOON-AIK
To: SPANSION, LLC
Reel/Frame 020714/0936 →