Integrated circuit including U-shaped access device
View Patent ↗An integrated circuit includes a first contact, a second contact, and a U-shaped access device coupled to the first contact and the second contact. The integrated circuit includes self-aligned dielectric material isolating the first contact from the second contact.
1. An integrated circuit comprising:
a first contact;
a second contact;
a U-shaped access device coupled to the first contact and the second contact; and
self-aligned dielectric material isolating the first contact from the second contact,
wherein the access device is provided in a substrate, the access device comprising:
a doped first region having a first polarity:
a doped second region having a second polarity opposite the first polarity, the second region isolated from the first region by the dielectric material which directly contacts the first region and the second region; and
a doped third region having the first polarity, the third region directly contacting the first region, the second region, and the dielectric material,
wherein the first region and the second region are aligned in a plane parallel to the substrate.
2. The integrated circuit of claim 1 , wherein the substrate includes a doped fourth region having the second polarity, the fourth region contacting the third region.
3. The integrated circuit of claim 1 , wherein the substrate comprises a silicon on insulator structure including an insulating material layer, the insulating material layer contacting the third region.
4. The integrated circuit of claim 1 , wherein the access device comprises one of a diode and a bipolar transistor.
5. The integrated circuit of claim 1 , further comprising:
a resistive memory element coupled to the first contact;
a first line coupled to the memory element; and
a second line coupled to the second contact.
6. The integrated circuit of claim 5 , wherein the memory element is self-aligned to the first line.
7. An integrated circuit comprising:
a first contact;
a second contact;
a U-shaped access device coupled to the first contact and the second contact;
self-aligned dielectric material isolating the first contact from the second contact;
a resistive memory element coupled to the first contact;
a first line coupled to the memory element; and
a second line coupled to the second contact,
wherein the first contact comprises a first silicon layer coupling a first side of the access device to the memory element, and
wherein the second contact comprises a second silicon layer coupling a second side of the access device to the second line.
8. The integrated circuit of claim 5 , wherein the memory element comprises a phase change element.
9. An integrated circuit comprising:
a first contact;
a second contact; and
a U-shaped access device coupled to the first contact and the second contact, the access device comprising:
a heavily doped first region having a first polarity;
a heavily doped second region having a second polarity opposite the first polarity, the second region isolated from the first region, and the second region aligned with the first region; and
a lightly doped third region having the first polarity, the third region contacting the first region and the second region.
10. The integrated circuit of claim 9 , wherein the access device comprises one of a diode and a bipolar transistor.
11. The integrated circuit of claim 9 , further comprising:
a resistance changing memory element coupled to the first contact;
a first line coupled to the memory element; and
a second line coupled to the second contact.
12. The integrated circuit of claim 11 , wherein the memory element comprises a phase change element.
13. The integrated circuit of claim 11 , wherein the first contact comprises a first silicon layer coupling a first side of the access device to the memory element, and
wherein the second contact comprises a second silicon layer coupling a second side of the access device to the second line.
14. The integrated circuit of claim 9 , further comprising:
a doped fourth region having the second polarity, the fourth region contacting the third region.
15. The integrated circuit of claim 9 , further comprising:
a silicon on insulator substrate in which the access device is provided, the silicon on insulator substrate including an insulating material layer, the insulating material layer contacting the third region.
16. The integrated circuit of claim 7 , wherein the access device is provided in a substrate, the access device comprising:
a doped first region having a first polarity;
a doped second region having a second polarity opposite the first polarity, the second region isolated from the first region by the dielectric material; and
a doped third region having the first polarity, the third region contacting the first region and the second region.
17. The integrated circuit of claim 16 , wherein the substrate includes a doped fourth region having the second polarity, the fourth region contacting the third region.
18. The integrated circuit of claim 16 , wherein the substrate comprises a silicon on insulator structure including an insulating material layer, the insulating material layer contacting the third region.
19. The integrated circuit of claim 7 , wherein the access device comprises one of a diode and a bipolar transistor.
20. The integrated circuit of claim 7 , wherein the memory element comprises a phase change element.