IP Library › Granted Patent US 7,909,977
Granted Patent B2
US 7,909,977 · App. 12/056,985 · Granted Mar 22, 2011

Method of manufacturing a substrate for a microelectronic device, and substrate formed thereby

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 7,909,977
App. No.
12/056,985
Granted
Mar 22, 2011
Kind
B2
Abstract

A method of manufacturing a substrate for a microelectronic device comprises providing a dielectric material ( 120, 220, 920 ) as a build-up layer of the substrate, applying a primer ( 140, 240, 940 ) to a surface ( 121, 221, 921 ) of the dielectric material, and forming an electrically conductive layer ( 150, 250, 950 ) over the primer. In another embodiment, the method comprises providing the dielectric material, forming the feature extending into the dielectric material, forming the electrically conductive layer over the dielectric material, applying the primer to a surface of the electrically conductive layer and attaching a dielectric layer ( 960 ) to the primer.

Claims (48)

1. A method of manufacturing a substrate for a microelectronic device, the method comprising:

providing a dielectric material as a build-up layer of the substrate;

applying a primer to a surface of the dielectric material; and

forming an electrically conductive layer over the primer, wherein:

applying the primer to the surface of the dielectric material comprises first applying the primer to a carrier sheet and then applying the carrier sheet with the primer to the surface of the dielectric material;

forming the electrically conductive layer over the primer occurs after the carrier sheet is removed to expose the primer; and

after applying the primer the method further comprises:

forming a feature that extends through the carrier sheet and the primer and into the dielectric material;

cleaning the feature; and

removing the carrier sheet and exposing the primer.

2. The method of claim 1 wherein:

the carrier sheet is a copper foil.

3. The method of claim 1 wherein:

the feature comprises a via; and

cleaning the feature comprises performing a desmear operation on the via.

4. The method of claim 1 wherein:

removing the carrier sheet comprises etching the copper foil.

5. A method of manufacturing a substrate for a microelectronic device, the method comprising:

providing a dielectric material as a build-up layer of the substrate;

applying a primer to a surface of the dielectric material; and

forming an electrically conductive layer over the primer,

wherein:

prior to applying the primer, the method further comprises forming a first feature that extends into the dielectric material;

applying the primer further comprises applying the primer in the first feature;

after applying the primer the method further comprises:

placing a protective barrier over the primer;

forming a second feature that extends through the protective barrier and the primer and into the dielectric material;

cleaning the second feature; and

removing the protective barrier and exposing the primer; and

forming the electrically conductive layer over the primer occurs after the protective barrier is removed to expose the primer.

6. The method of claim 5 wherein:

the protective barrier is a polyester film.

7. The method of claim 5 wherein:

the protective barrier is a layer of copper.

8. The method of claim 5 wherein:

the first feature comprises a trench and the second feature comprises a via; and

cleaning the second feature comprises performing a desmear operation on the via.

9. The method of claim 5 wherein:

applying the primer comprises coating the primer on the surface of the dielectric material using one of a thin film lamination process and a roller coating operation.

10. The method of claim 5 further comprising:

partially curing the primer before placing the protective barrier; and

fully curing the primer after forming the electrically conductive layer over the primer.

11. The method of claim 1 wherein:

forming the electrically conductive layer comprises:

electrolessly depositing a first copper layer;

patterning the first copper layer using a film resist;

electrolytically depositing a second copper layer over the first copper layer; and

removing the film resist.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2026
From: INTEL CORPORATION
To: INTEL FOUNDRY IP LLC
Reel/Frame 076065/0923 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 18, 2009
From: JOMAA, HOUSSAM; ALUR, AMRUTHAVALLI P.; SENEVIRATNE, DILAN
To: INTEL CORPORATION
Reel/Frame 022698/0853 →
Continuity (1)
Related Publication 20090246462A1 · Oct 1, 2009