Bitline current generator for a non-volatile memory array and a non-volatile memory array
View Patent ↗A bitline current generator, for a non-volatile memory array which comprises a plurality of memory bitcells and bitlines, comprises a switching means for each bitline for coupling a bitline to a program voltage supply when the bitline is selected for programming and a variable current source for providing a programming current to said selected bitlines. The variable current source is adapted to select a level of said programming current such that the programming of the selected memory bitcells does not disturb the programed state of the unselected memory bitcells on unselected bitlines.
1. A bitline current generator for a floating gate non-volatile memory array, said floating-gate non-volatile memory array comprising a plurality of memory bitcells and bitlines, the bitline current generator comprising:
a transistor for each bitline for coupling a bitline to a program voltage supply when the bitline is selected for programming;
a variable current source for providing a programming current to said selected bitline, the variable current source being adapted to select a level of said programming current such that programming of selected memory bitcells on said selected bitline does not disturb a programmed state of unselected memory bitcells on unselected bitlines;
a programmable current source; and
a current mirror having an input coupled to the programmable current source and an output for providing the programming current;
wherein the variable current source further comprises a programmable voltage reference, adapted to provide a variable reference voltage to the current mirror.
2. The bitline current generator of claim 1 , wherein the variable current source further comprises a buffer connected between the programmable voltage reference and the current mirror for buffering the variable reference voltage provided at an output of the programmable voltage reference.
3. The bitline current generator of claim 2 , wherein the output of the programmable voltage reference controls an output of the programmable current source.
4. The bitline current generator of claim 1 , wherein the programmable voltage reference is a Digital-to-Analog converter.
5. The bitline current generator of claim 2 , wherein the buffer comprises an operational amplifier in a unity gain configuration.
6. The bitline current generator of claim 4 , wherein the Digital-to-Analog converter is a resistor network Digital-to-Analog converter.
7. The bitline current generator of claim 6 , wherein the resistor network Digital-to-Analog converter comprises:
a plurality of resistors connected in series across a power supply and having a plurality of output taps, wherein a node between two of said plurality of resistors is an output tap providing a fractional voltage of said power supply; and
a multiplexer for selecting a one of the output taps for output.
8. The bitline current generator of claim 7 , wherein the plurality of resistors comprises a predetermined number of resistors, the predetermined number of resistors being selected such that the output taps of the resistor network as a whole ensures a minimum desired output voltage and a suitable range of further output voltages is provided.
9. The bitline current generator of claim 1 , wherein the transistor is arranged in operation to operate in a saturated mode.
10. The bitline current generator of claim 1 , wherein the programmable current source comprises:
a fixed current source; and
a programmable current mirror having an input transistor coupled to the fixed current source, an output and a plurality of output transistors coupled to the input transistor and selectively coupled to the output for providing a programmable output current signal, a current level of the output current signal depending on which transistors are selected to be coupled to the output.
11. The bitline current generator according to claim 10 wherein the output transistors are dimensioned such that a current level of the output current signal is a multiple of a current level of the current signal provided by the fixed current source.
12. A non-volatile memory array comprising a plurality of memory bitcells and bitlines and a bitline current generator according to claim 1 .
13. The bitline current generator of claim 1 , wherein the transistor is arranged in operation to operate in a saturated mode.
14. The bitline current generator of claim 13 , wherein the programmable current source comprises:
a fixed current source; and
a programmable current mirror having an input transistor coupled to the fixed current source, an output and a plurality of output transistors coupled to the input transistor and selectively coupled to the output for providing a programmable output current signal, a current level of the output current signal depending on which transistors are selected to be coupled to the output.
15. The bitline current generator of claim 3 , wherein the programmable current source comprises:
a fixed current source; and
a programmable current mirror having an input transistor coupled to the fixed current source, an output and a plurality of output transistors coupled to the input transistor and selectively coupled to the output for providing a programmable output current signal, a current level of the output current signal depending on which transistors are selected to be coupled to the output.
16. The bitline current generator of claim 2 , wherein the programmable current source comprises:
a fixed current source; and
a programmable current mirror having an input transistor coupled to the fixed current source, an output and a plurality of output transistors coupled to the input transistor and selectively coupled to the output for providing a programmable output current signal, a current level of the output current signal depending on which transistors are selected to be coupled to the output.
17. A bitline current generator for a floating gate non-volatile memory array, said floating-gate non-volatile memory array comprising a plurality of memory bitcells and bitlines, the bitline current generator comprising:
a transistor for each bitline for coupling a bitline to a program voltage supply when the bitline is selected for programming; and
a variable current source for providing a programming current to said selected bitlines, the variable current source being adapted to select a level of said programming current such that the programming of selected memory bitcells does not disturb a programmed state of unselected memory bitcells on unselected bitlines, wherein the variable current source comprises a programmable voltage reference adapted to provide a variable reference voltage to a current mirror of the variable current source.