3-D integrated semiconductor device comprising intermediate heat spreading capabilities
In a three-dimensional chip configuration, a heat spreading material may be positioned between adjacent chips and also between a chip and a carrier substrate, thereby significantly enhancing heat dissipation capability. Furthermore, appropriately sized and positioned through holes in the heat spreading material may enable electrical chip-to-chip connections, while responding thermally conductive connectors may extend to the heat sink without actually contacting the corresponding chips.
1. A semiconductor device, comprising:
a stacked chip configuration, comprising:
a first chip comprising a first substrate and first circuit elements formed above said first substrate proximate an active surface of said first chip;
a second chip comprising a second substrate and second circuit elements formed above said second substrate proximate an active surface of said second chip;
a heat spreading material positioned between said first chip and said second chip and having a plurality of through holes, wherein said active surface of said first chip is positioned proximate a first surface of said heat spreading material, and said active surface of said second ship positioned proximate a second surface of said heat spreading material; and
a plurality of electrical connections extending through said plurality of through holes to electrically connect said first and second chips.
2. The semiconductor device of claim 1 , wherein said heat spreading material has a lateral dimension that is greater than a lateral dimension of said first chip and said second chip.
3. The semiconductor device of claim 2 , further comprising one or more thermally conductive connectors that connect said heat spreading material with a heat sink.
4. The semiconductor device of claim 3 , wherein said one or more thermally conductive connectors are provided at a peripheral area of said heat spreading material so as to not be in mechanical contact with said first and second chips.
5. The semiconductor device of claim 1 , further comprising a second heat spreading material attached to one of said first and second chips.
6. The semiconductor device of claim 5 , further comprising a carrier substrate attached to said second heat spreading material.
7. The semiconductor device of claim 6 , further comprising one or more second thermally conductive connectors extending to a heat sink attached to said carrier substrate.
8. The semiconductor device of claim 1 , wherein said heat spreading material is attached to at least one of said first and second chips by an electrically insulating adhesive.
9. The semiconductor device of claim 1 , wherein said heat spreading material is attached to at least one of said first and second chips by a contact structure connecting to a bump structure formed on said at least one of said first and second chips.
10. The semiconductor device of claim 1 , wherein a thickness of said heat spreading material is approximately 50-500 μm.
11. The semiconductor device of claim 1 , wherein said heat spreading material is an electrically insulating material.
12. The semiconductor device of claim 1 , wherein said heat spreading material comprises a metal.
13. A semiconductor device, comprising:
a stacked chip configuration, comprising:
a first chip comprising a first substrate and first circuit elements formed above said first substrate;
a second chip comprising a second substrate and second circuit elements formed above said second substrate;
at least one of a carrier substrate and a third chip, said third chip comprising a third substrate and third circuit elements formed above said third substrate;
a first heat spreading material positioned between said first chip and said second chip, wherein said first heat spreading material comprises a first base having a plurality of first through holes and a first thermally conductive connector;
a plurality of first electrical connections extending through said plurality of first through holes to electrically connect said first and second chips;
a second heat spreading material positioned between said second chip and said at least one of said carrier substrate and said third chip, wherein said second heat spreading material comprises a second base having a plurality of second through holes and wherein said first thermally conductive connector is in conductive contact with said second base; and
a plurality of second electrical connections extending through said plurality of second through holes to electrically connect said second chip and said at least one of said carrier substrate and said third chip.
14. The semiconductor device of claim 13 , further comprising a heat sink, wherein said second heat spreading material further comprises a second thermally conductive connector in conductive contact with said heat sink.
15. The semiconductor device of claim 14 , wherein said first thermally conductive connector is laterally spaced from outside edges of said first and second chips such that there is no mechanical contact between said first thermally conductive connector and said first and second chips, and wherein said second thermally conductive connector is laterally spaced from outside edges of said second chip and said at least one of said carrier substrate and said third chip such that there is no mechanical contact between said second thermally conductive connector and said at least one of said carrier substrate and said third chip.