IP Library › Granted Patent US 8,099,543
Granted Patent B2
US 8,099,543 · App. 12/364,923 · Granted Jan 17, 2012

Methods of operarting memory devices within a communication protocol standard timeout requirement

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 8,099,543
App. No.
12/364,923
Granted
Jan 17, 2012
Kind
B2
Abstract

The present disclosure includes methods and devices for logical memory blocks. One method for operating a memory device includes receiving a command to operate X pages of the memory device, X being greater than Y, and executing the command by executing multiple subcommands, each subcommand operating on a logical memory block portion of the X pages, each logical memory block including at most Y pages. T is a timeout limit, N is a number of pages comprising a block of memory, and Y is number of pages that can be operated within time T.

Claims (45)

1. A method for operating a memory device, comprising:

receiving, to the memory device from a host system, a command to operate X pages of the memory device, X being greater than Y; and

replacing the command into multiple subcommands;

executing the replaced command by executing the multiple subcommands, each subcommand operating on a logical memory block portion of the X pages, each logical memory block including at most Y pages,

wherein T is a timeout limit, N is a number of pages comprising a block of memory, and Y is a number of pages that can be operated within time T.

2. The method of claim 1 , wherein X equals N.

3. The method of claim 2 , wherein executing the command includes executing a first subcommand to operate M pages of the memory device, and executing a second subcommand to operate N-M pages of the memory device.

4. The method of claim 3 , wherein M equals Y.

5. The method of claim 3 , wherein M does not equal Y.

6. The method of claim 5 , wherein M equals Y.

7. The method of claim 3 , wherein M is determined to be a percentage of the N pages.

8. The method of claim 2 , wherein the command is a BLOCK COPY operation.

9. The method of claim 2 , wherein T is a communication protocol timeout limit.

10. The method of claim 9 , wherein T is determined from a Multi-Media Card (MMC) communication protocol standard.

11. The method of claim 9 , wherein T is determined from a Secure Disk (SD) communication protocol standard.

12. The method of claim 11 , wherein T is about 250 mS.

13. A method for operating a memory device, comprising:

receiving a first command to operate X pages of the memory device;

executing a first subcommand la implementing a first portion of the first command and operating on a first logical memory block (LMB) portion of the X pages, the first LMB including at most a number of pages that can be operated within a communication protocol standard timeout limit;

signaling capacity to receive another command after executing the first subcommand;

receiving a second command to operate the memory device;

executing the second command; and

executing a second subcommand after executing the second command by implementing a second portion of the first command and operating on a second LMB portion of the X pages, the second LMB including at most a number of pages that can be operated within a communication protocol standard timeout limit.

14. The method of claim 13 , wherein the second LMB includes the number of pages that can be operated within a communication protocol standard timeout limit measured from receiving the second command.

15. The method of claim 14 , wherein the second LMB includes the portion of the X pages not included in the first LMB.

16. The method of claim 14 , wherein the second LMB includes less than the portion of the X pages not included in the first LMB.

17. The method of claim 16 , further comprising:

signaling capacity to receive another command after executing the second subcommand;

receiving a third command to operate the memory device;

executing the third command; and

executing a third subcommand after executing the third command by implementing a third portion of the first command and operating on a third LMB portion of the X pages, the third LMB including at most a number of pages that can be operated within a communication protocol standard timeout limit.

18. The method of claim 17 , wherein the third LMB includes the number of pages that can be operated within a communication protocol standard timeout limit measured from receiving the third command.

19. The method of claim 18 , wherein the third LMB includes the portion of the X pages not included in either of the first or second LMBs.

20. A method for operating a memory device, comprising:

receiving a data move command to the memory device from a host system involving a source block of the memory device;

replacing the data move command with multiple data move subcommands;

executing the replaced data move command by executing the multiple data move subcommands, each data move subcommand:

reading content of a page from the source block; and

programming a page in a destination block of the memory device with the content of the page read from the source block page;

wherein the multiple data move subcommands involve at most a remaining number of pages that can be read and programmed within a timeout limit associated with completion of the data move command.

21. The method of claim 20 , further comprising:

determining availability of an erased block of memory for use as the destination block of memory;

erasing a block of memory for use as the destination block of memory where an erased block of memory is not available; and

transferring the content of a page from the source block external to the memory device to check for data propagation errors,

wherein checking for data propagation errors include detecting and correcting data propagation errors.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2009
From: FISHER, RYAN G.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 022199/0082 →
Continuity (1)
Related Publication 20100199019A1 · Aug 5, 2010