IP Library Granted Patent US 8,158,487
Granted Patent B2
US 8,158,487 · App. 13/011,267 · Granted Apr 17, 2012

Annealing process for annealing a structure

Assignee: Soitec
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Quick Facts
Patent No.
US 8,158,487
App. No.
13/011,267
Granted
Apr 17, 2012
Kind
B2
Abstract

The invention relates to a process for annealing a structure that includes at least one wafer, with the annealing process including conducting a first annealing of the structure in an oxidizing atmosphere while holding the structure in contact with a holder in a first position in order to oxidize at least portion of the exposed surface of the structure, shifting the structure on the holder into a second position in which non-oxidized regions of the structure are exposed, and conducting a second annealing of the structure in an oxidizing atmosphere while holding the structure in the second position. The process provides an oxide layer on the structure.

Claims (20)

1. A process for annealing a structure that includes at least one wafer, wherein the process comprises:

conducting a first annealing of the structure in an oxidizing atmosphere while holding the structure in contact with a holder in a first position in order to oxidize at least a portion of an exposed surface of the structure;

shifting the structure on the holder into a second position in which non-oxidized regions of the structure are exposed; and

conducting a second annealing of the structure in the oxidizing atmosphere while holding the structure in the second position.

2. The process of claim 1 , wherein the shifting includes rotating the structure through an angle relative to the holder.

3. The process of claim 2 , wherein the angle through which the structure is rotated is between 40° and 90°.

4. The process of claim 1 , wherein the non-oxidized regions of the structure represent regions of contact between the structure and the holder in the first position.

5. The process of claim 1 , wherein the structure is held by the holder in the second position by contact with oxidized regions of the structure.

6. The process of claim 1 , wherein the first and second annealings of the structure in the oxidizing atmosphere provides an oxide layer on the structure.

7. The process of claim 6 , which is conducted to form a uniform oxide layer on the entire surface of the structure.

8. The process of claim 1 , wherein the structure is a heterostructure formed by bonding a first wafer to a second wafer.

9. The process of claim 8 , which further comprises, after the second annealing:

thinning the first wafer; and

chemical trimming the first wafer.

10. The process of claim 1 , wherein the structure is a first wafer and which further comprises forming a heterostructure after the second annealing by bonding the first wafer to a second wafer.

11. The process of claim 10 , which further comprises before bonding the wafers, forming at least one microcomponent in the second wafer.

12. The process of claim 10 , which further comprises annealing the heterostructure for stabilizing the bond between the wafers.

13. The process of claim 12 , which further comprises after conducting the stabilizing annealing:

thinning the first wafer; and

chemical trimming the first wafer.

Assignments (2)
CHANGE OF NAME Recorded Mar 1, 2012
From: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
To: SOITEC
Reel/Frame 027793/0535 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2011
From: SOUSBIE, NICOLAS; ASPAR, BERNARD; BARGE, THIERRY; LAGAHE BLANCHARD, CHRYSTELLE
To: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
Reel/Frame 025808/0801 →
Priority Claims (1)
FR 10 50469 · Jan 25, 2010 · national
Continuity (1)
Related Publication 20110183495A1 · Jul 28, 2011