Feedforward synchronization in asynchronous packet networks
To perform timing synchronization in an asynchronous packet network, remote timestamps representative of a transmitter clock at a transmitter are received over a packet network. These are compared with local timestamps representative of the timing of a local oscillator at the receiver to produce an estimate of the offset between the transmitter clock and the local oscillator at the receiver. This estimate is then used to generate update values for a digital controlled oscillator producing the output clock at the receiver. The system operates in a feedforward configuration wherein the local oscillator at the receiver serves as one input to the offset estimator.
1. A method of performing timing synchronization in an asynchronous packet network, comprising:
receiving over a packet network remote timestamps representative of a transmitter clock at a transmitter;
generating local timestamps at a receiver representative of the timing of a local oscillator at the receiver;
generating an output clock at the receiver with a digital controlled oscillator;
deriving an adjustment signal from the local and remote timestamps; and
adjusting the digital controlled oscillator in a feedforward configuration in accordance with the derived adjustment signal,
wherein a plurality of digital controlled oscillators are adjusted in a feedforward configuration based on a common estimate of the offset between the transmitter clock and the local oscillator derived from the remote and local timestamps.
2. A method as claimed in claim 1 , wherein the adjustment signal adjusts the frequency and phase of the digital controlled oscillator.
3. A method as claimed in 2 , wherein the adjustment signal is based on a Least Squares estimate.
4. A method as claimed in claim 3 , wherein the adjustment of the digital controlled oscillator is performed in accordance with the equations:
α
^
s
=
∑
x
k
y
k
-
1
N
∑
x
k
∑
y
k
∑
x
k
2
-
1
N
(
∑
x
k
)
2
Φ
^
s
=
1
N
∑
x
k
2
∑
y
k
-
1
N
∑
x
k
∑
x
k
y
k
∑
x
k
2
-
1
N
(
∑
x
k
)
2
where a α x is the frequency deviation, y k is the transit time through the network, Φ x is the phase offset, y k is the transit time through the network, x k is the transmitter timestamp, and N is the number of data samples.
5. A method as claimed in claim 3 , wherein the remote timestamps and the difference between the remote timestamps and the local timestamps are fed into a data accumulation unit which accumulates data over a preset time, and wherein the data accumulation unit includes adders and delay units for generating signals S x ,S y S xy and S 2x , where
S x =Σ( x k )
S y =Σ( y k )
S 2x =Σ( x k 2 )
S xy =Σ( x k y k )
where y k is the transit time through the network, and x k is theransmitter timestamp.
6. A method as claimed in claim 5 , wherein the signals S x , S y , S xy and S 2x are input to a DCO adjustment unit, which generates the signals
α
s
=
(
S
xy
-
S
x
S
y
/
N
)
(
S
2
x
-
S
x
2
/
N
)
Φ
s
=
(
S
2
x
S
y
-
S
x
S
xy
)
/
N
(
S
2
x
-
S
x
2
/
N
)
where α s is the frequency deviation, and Φ s is the phase offset.
7. A method as claimed in claim 4 , wherein an update value α for the frequency of the digital controlled oscillator is generated by multiplying frequency deviation α s by a scaling factor C and an update value Φ for phase of the digital controlled oscillator is generated by multiplying phase offset Φ s by the reciprocal of the scaling factor 1/C.
8. A method as claimed in claim 1 , wherein separate update values are derived for each digital controlled oscillator from the common estimate.
9. A method as claimed in claim 1 , wherein the adjustment signal is based on a recursive least squares estimate.
10. A timing synchronization apparatus for use at a receiver in an asynchronous packet network comprising:
a local oscillator for generating a system clock at the receiver;
a timestamp unit for generating local timestamps representative of the local oscillator timing;
a processor for receiving remote timestamps sent from a transmitter over a packet network representative of the transmitter clock and the local timestamps to generate an adjustment signal based on an estimate of the offset between the local oscillator and the transmitting clock;
a digital controlled oscillator for generating an output clock at the receiver;
an adjustment unit for adjusting the digital controlled oscillator based on the estimate of the offset in a feedforward configuration; and
a plurality of digital controlled oscillators,
wherein said digital controlled oscillators are adjusted in a feedforward configuration based on a common offset estimate between the transmitter clock and the local oscillator derived by said processor from the remote and local timestamps.
11. An apparatus in claim 10 , wherein the processor derives frequency and phase offset signals from the remote and local timestamps.
12. An apparatus as claimed in claim 11 , wherein the frequency adjustment unit comprises a first multiplier for multiplying the frequency offset signal by a scaling factor C and a second multiplier for multiplying the phase offset signal by the reciprocal of the scaling factor C to produce update values for the digital controlled oscillator.
13. An apparatus as claimed in 10 , wherein the adjustment is based on a Least Squares estimate.
14. An apparatus as claimed in claim 13 , wherein the processor derives the frequency and phase offsets in accordance with the equations:
α
^
s
=
∑
x
k
y
k
-
1
N
∑
x
k
∑
y
k
∑
x
k
2
-
1
N
(
∑
x
k
)
2
Φ
^
s
=
1
N
∑
x
k
2
∑
y
k
-
1
N
∑
x
k
∑
x
k
y
k
∑
x
k
2
-
1
N
(
∑
x
k
)
2
where α s is the frequency deviation, y k is the transit time through the network, Φ s is the phase offset, y k is the transit time through the network, x k is the transmitter timestamp, and N is the number of data samples.
15. An apparatus as claimed in claim 13 , further comprising data accumulation unit having inputs configured to receive the difference between the remote timestamps and the local timestamps and comprising an internal counter, a plurality of adders and delays units, which are configured to generate the signals S x , S y , S xy and S 2x accumulated over a preset time determined by a main counter where
S x =Σ( x k )
S y =Σ( y k )
S 2x =Σ( x k 2 )
S xy =Σ( x k y k )
where y k is the transit time through the network, and x k is the transmitter timestamp.
16. An apparatus as claimed in claim 15 , further comprising an adjustment unit for the digital controlled oscillator configured to generate the signals
α
s
=
(
S
xy
-
S
x
S
y
/
N
)
(
S
2
x
-
S
x
2
/
N
)
Φ
s
=
(
S
2
x
S
y
-
S
x
S
xy
)
/
N
(
S
2
x
-
S
x
2
/
N
)
where α s is the frequency deviation, and Φ s is the phase offset.
17. An apparatus as claimed in claim 10 , further comprising a plurality of adjustment units for deriving a separate adjustment signal for each digital controlled oscillator from the common estimate of the offset.
18. An apparatus as claimed in claim 10 , wherein the estimate of the offset is based on a recursive least squares estimate.