IP Library Granted Patent US 8,420,550
Granted Patent B2
US 8,420,550 · App. 11/611,403 · Granted Apr 16, 2013

Method for cleaning backside etch during manufacture of integrated circuits

Inventors: Yan Wu Chang (Shanghai, CN); Tek Sing Lim (Shanghai, CN)
Assignees: Semiconductor Manufacturing International (Shanghai) Corporation; Semiconductor Manufacturing International (Beijing) Corporation
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Quick Facts
Patent No.
US 8,420,550
App. No.
11/611,403
Granted
Apr 16, 2013
Kind
B2
Abstract

A method for manufacturing semiconductor substrates. The method includes providing a semiconductor wafer, which has an upper surface, a backside surface, and an edge region around a periphery of the semiconductor wafer. In a preferred embodiment, the upper surface is often for the manufacture of the integrated circuit device elements themselves. The method includes subjecting the semiconductor wafer to one or more process steps to form one or more films of materials on the backside surface. The method mounts the semiconductor wafer to expose the backside surface. The method rotates the semiconductor wafer in a circular manner. In a specific embodiment, the method includes supplying an acid solution containing fluorine bearing species, a nitric acid species, a surfactant species, and an organic acid species, on at least the backside surface as the semiconductor wafer rotates. The method causes removal of one or more contaminants from the backside surface, while a portion of the center region of the backside surface remains exposed as the semiconductor wafer rotates in the circular manner.

Claims (20)

1. A method for manufacturing semiconductor substrates, the method comprising:

providing a semiconductor wafer, the semiconductor wafer having an upper surface, a backside surface, and an edge region around a periphery of the semiconductor wafer;

subjecting the semiconductor wafer to one or more process steps to form one or more films of materials on the backside surface;

mounting the semiconductor wafer to expose the backside surface;

rotating the semiconductor wafer in a circular manner;

supplying an acid solution containing fluorine bearing species, a nitric acid species, a surfactant species, and an organic acid species, on at least the backside surface of the semiconductor wafer as the semiconductor wafer rotates;

causing removal of one or more contaminants from at least the backside surface; and

forming an edge exclusion region within a vicinity of the edge region around the periphery of the semiconductor wafer of at least 0.8 millimeter and greater, while a portion of the center region of the backside surface remains exposed as the semiconductor wafer rotates in the circular manner;

wherein the one or more contaminants comprise a first polysilicon material;

wherein the edge exclusion region comprises a second polysilicon material; and

wherein the acid solution comprises a mixture of nitric acid (HNO3), hydrofluoric acid (HF), surfactant, and acetic acid (CH3COOH) in a 160:1:30:8 ratio,

wherein the one or more contaminants comprise one or more silicon bearing needle structures.

2. The method of claim 1 wherein the rotating is provided at 800 revolutions per minute to about 1200 revolutions per minute.

3. The method of claim 1 wherein the surfactant species reduces a surface tension of the acid solution.

4. The method of claim 1 wherein the organic acid species reduces a surface tension of the acid solution.

5. The method of claim 1 wherein the organic acid species serves as a buffer species.

6. The method of claim 1 wherein the one or more contaminants comprises one or more particles.

7. The method of claim 1 wherein the semiconductor substrate is characterized by one or more patterns having a 110 nanometer design rule.

8. The method of claim 1 further comprising cleaning the acid solution from the semiconductor substrate using a water solution.

9. The method of claim 8 further comprising drying the semiconductor substrate using a nitrogen gas.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2013
From: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION; SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
Reel/Frame 029625/0763 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2010
From: CHANG, YAN WU; LIM, TEK SING
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 024125/0607 →
Continuity (1)
Related Publication 20080142052A1 · Jun 19, 2008