IP Library Assignment 029625/0763
Patent Assignment
Reel/Frame 029625/0763

Assignment of Assignor's Interest

Recorded: 2013-01-14 Pages: 6
Assignor
Assignees
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
18 ZHANG JIANG RD., PUDONG NEW AREA, SHANGHAI, 201203, CHINA
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
18 WEN CHANG ROAD, ECONOMIC-TECHNOLOGICAL DEVELOPMENT AREA, DAXING DISTRICT, BEIJING, 100176, CHINA
Covered Properties (65)
Method for Processing a Photomask for Semiconductor Devices
Patent: 8,268,086 →
Application: 10/927,821 →
Publication: US 2005/0274397
Method and System for Metal Barrier and Seed Integration
Patent: 8,309,456 →
Application: 11/249,141 →
Publication: US 2006/0110902
Split Dual Gate Field Effect Transistor
Patent: 8,614,487 →
Application: 11/377,936 →
Publication: US 2007/0181917
System and Method for I/O Esd Protection with Floating and/or Biased Polysilicon Regions
Patent: 8,686,507 →
Application: 11/517,546 →
Publication: US 2007/0164362
Method for Cleaning Backside Etch During Manufacture of Integrated Circuits
Patent: 8,420,550 →
Application: 11/611,403 →
Publication: US 2008/0142052
Cmos Image Sensor
Patent: 8,304,821 →
Application: 11/615,969 →
Publication: US 2007/0181922
System and Method for Direct Etching
Patent: 7,534,711 →
Application: 11/615,972 →
Publication: US 2008/0146030
Reliability Test Structure for Multilevel Interconnect
Patent: 8,323,990 →
Application: 11/728,184 →
Publication: US 2008/0128693
System and Method for Manufacturing Contact
Patent: 8,828,867 →
Application: 11/950,370 →
Publication: US 2008/0138981
Method and System for Image Sensor and Lens on a Silicon Back Plane Wafer
Patent: 8,749,006 →
Application: 11/952,901 →
Publication: US 2008/0135897
Method and Structure for Copper Gap Fill Plating of Interconnect Structures for Semiconductor Integrated Circuits
Patent: 8,242,017 →
Application: 12/044,254 →
Publication: US 2009/0227103
Silicon Germanium and Polysilicon Gate Structure for Strained Silicon Transistors
Patent: 8,551,831 →
Application: 12/234,393 →
Publication: US 2009/0152599
Method of Eliminating Micro-Trenches During Spacer Etch
Patent: 8,187,950 →
Application: 12/258,366 →
Publication: US 2010/0006975
Method for Forming P-Type Lightly Doped Drain Region Using Germanium Pre-Amorphous Treatment
Patent: 8,318,571 →
Application: 12/258,375 →
Publication: US 2010/0003799
Atomic Layer Deposition Epitaxial Silicon Growth for Tft Flash Memory Cell
Patent: 8,415,218 →
Application: 12/259,128 →
Publication: US 2010/0001334
Tft Sas Memory Cell Structures
Patent: 8,513,079 →
Application: 12/259,144 →
Publication: US 2010/0001281
A Method of Forming Tft Floating Gate Memory Cell Structures
Patent: 8,420,466 →
Application: 12/259,165 →
Publication: US 2010/0001282
Method of Interconnect for Image Sensor
Patent: 8,247,258 →
Application: 12/259,172 →
Publication: US 2010/0197066
Method and System for Calibrating Exposure System for Manufacturing of Integrated Circuits
Patent: 8,804,100 →
Application: 12/398,143 →
Publication: US 2010/0316958
Method and Structure for Fabricating Smooth Mirrors for Liquid Crystal on Silicon Devices
Patent: 9,310,643 →
Application: 12/420,706 →
Publication: US 2009/0200564
Semiconductor Device with Amorphous Silicon Monos Memory Cell Structure and Method for Manufacturing Thereof
Patent: 8,143,666 →
Application: 12/576,231 →
Publication: US 2010/0025686
Device Under Bonding Pad Using Single Metallization
Patent: 8,373,272 →
Application: 12/582,690 →
Publication: US 2011/0037177
Method and Device for a Cmos Image Sensor
Application: 12/582,694 →
Publication: US 2010/0165165
System and Method for Test Structure on a Wafer
Patent: 8,415,663 →
Application: 12/616,749 →
Publication: US 2010/0164508
System and Method for I/O Esd Protection with Polysilicon Regions Fabricated by Processes for Making Core Transistors
Patent: 8,283,726 →
Application: 12/623,363 →
Publication: US 2010/0059824
Method and System for Determining Semiconductor Characteristics
Patent: 8,679,864 →
Application: 12/637,688 →
Publication: US 2010/0167428
Method and Structure for Performing a Chemical Mechanical Polishing Process
Patent: 8,105,898 →
Application: 12/647,362 →
Publication: US 2010/0227464
System and Method for Detecting One or More Winding Paths for Patterns on a Reticle for the Manufacture of Semiconductor Integrated Circuits
Patent: 8,762,902 →
Application: 12/649,278 →
Publication: US 2010/0169852
System and Method for Metal-Oxide-Semiconductor Field Effect Transistor
Patent: 8,217,471 →
Application: 12/650,494 →
Publication: US 2010/0171186
Amplitude Shift Keyed (Ask) Demodulation Pattern and Use in Radio Frequency Identification (Rfid)
Patent: 8,446,983 →
Application: 12/692,603 →
Publication: US 2010/0189196
Method for Manufacturing Nano-Crystalline Silicon Material for Semiconductor Integrated Circuits
Patent: 8,748,260 →
Application: 12/704,495 →
Publication: US 2011/0045661
Method for Manufacturing Twin Bit Structure Cell with AL2O3/Nano-Crystalline Si Layer
Patent: 8,114,732 →
Application: 12/704,502 →
Publication: US 2011/0045649
Method and System for Continuous Line-Type Landing Polysilicon Contact (Lpc) Structures
Patent: 8,318,556 →
Application: 12/704,511 →
Publication: US 2011/0042732
System and Method for Quality Assurance for Reticles Used in Manufacturing of Integrated Circuits
Patent: 8,319,959 →
Application: 12/724,276 →
Publication: US 2010/0233594
Method of Flash Memory Design with Differential Cell for Better Endurance
Patent: 8,320,193 →
Application: 12/794,697 →
Publication: US 2011/0063924
Method of Programming Flash Memory of the Differential Cell Structures for Better Endurance
Patent: 8,295,096 →
Application: 12/794,698 →
Publication: US 2011/0051522
Electrically Programmable Device with Embedded Eeprom and Method for Making Thereof
Patent: 8,354,707 →
Application: 12/833,939 →
Publication: US 2010/0276745
Multilayer Oxide on Nitride on Oxide Structure and Method for the Manufacture of Semiconductor Devices
Patent: 8,269,311 →
Application: 12/845,651 →
Publication: US 2011/0062551
Method and Structure for Self Aligned Contact for Integrated Circuits
Patent: 8,507,378 →
Application: 12/848,068 →
Publication: US 2011/0037130
Method and System for Cmos Image Sensing Device
Patent: 9,269,625 →
Application: 12/848,229 →
Publication: US 2011/0187909
Wireless Memory Card and Method Thereof
Patent: 8,521,956 →
Application: 12/857,513 →
Publication: US 2011/0066777
Method of Rapid Thermal Treatment Using High Energy Electromagnetic Radiation of a Semiconductor Substrate for Formation of Epitaxial Materials
Patent: 8,309,472 →
Application: 12/869,620 →
Publication: US 2011/0065281
Method for Manufacturing Nano-Crystalline Silicon Material from Chloride Chemistries for the Semiconductor Integrated Circuits
Patent: 8,685,826 →
Application: 12/884,057 →
Publication: US 2011/0070711
Via Contact Structures and Methods for Integrated Circuits
Patent: 8,329,529 →
Application: 12/885,248 →
Publication: US 2011/0074036
Non-Volatile Memory Having Nano Crystalline Silicon Hillocks Floating Gate
Patent: 8,815,680 →
Application: 12/886,534 →
Publication: US 2011/0084328
Method and Structure for Silicon Nanocrystal Capacitor Devices for Integrated Circuits
Application: 12/887,481 →
Publication: US 2011/0095396
Structure and Method for Semiconductor Testing
Application: 12/887,491 →
Publication: US 2011/0074459
Scalable Flash Eeprom Memory Cell with Floating Gate Spacer Wrapped by Control Gate and Method of Manufacture
Patent: 8,119,479 →
Application: 12/887,496 →
Publication: US 2011/0089479
Surrounding Stacked Gate Multi-Gate Fet Structure Nonvolatile Memory Device
Patent: 8,513,727 →
Application: 12/892,879 →
Publication: US 2011/0163369
Cmos Image Sensor with Non-Contact Structure
Patent: 8,513,721 →
Application: 12/902,134 →
Publication: US 2012/0181589
Method for Fabricating an Enlarged Oxide-Nitride-Oxide Structure for Nand Flash Memory Semiconductor Devices
Patent: 8,354,704 →
Application: 12/917,419 →
Publication: US 2011/0115012
Method for Copper Hillock Reduction
Patent: 8,815,615 →
Application: 12/938,158 →
Publication: US 2012/0070915
Method and Structure for Electro-Plating Aluminum Species for Top Metal Formation of Liquid Crystal on Silicon Displays
Application: 12/938,166 →
Publication: US 2011/0109856
Semiconductor Device with a 7F2 Cell Structure
Application: 12/938,178 →
Publication: US 2011/0108889
Method for Determining Color Using Cmos Image Sensor
Patent: 8,383,444 →
Application: 12/953,410 →
Publication: US 2011/0149085
Method for Forming a Cmos Image Sensing Pixel
Patent: 8,404,510 →
Application: 12/953,414 →
Publication: US 2011/0070677
System and Method for Eeprom Architecture
Patent: 8,470,669 →
Application: 12/959,229 →
Publication: US 2011/0133264
Method for Manufacturing Twin Bit Structure Cell with Aluminum Oxide Layer
Patent: 8,546,224 →
Application: 12/965,808 →
Publication: US 2011/0140190
Method for Manufacturing Twin Bit Structure Cell with Silicon Nitride Layer
Patent: 9,064,804 →
Application: 12/968,264 →
Publication: US 2011/0140191
Method for Manufacturing Twin Bit Structure Cell with Floating Polysilicon Layer
Application: 12/969,563 →
Publication: US 2011/0140192
Method for Manufacturing Twin Bit Structure Cell with Hafnium Oxide Layer
Application: 12/978,346 →
Publication: US 2011/0156123
Method for Manufacturing Twin Bit Structure Cell with Hafnium Oxide and Nano-Crystalline Silicon Layer
Patent: 8,598,001 →
Application: 12/978,473 →
Publication: US 2011/0156129
Method and Device for Cmos Image Sensing with Multiple Gate Oxide Thicknesses
Patent: 8,383,445 →
Application: 12/979,258 →
Publication: US 2011/0204425
Anti-Fuse Based Programmable Serial Number Generator
Patent: 8,350,356 →
Application: 12/979,265 →
Publication: US 2012/0061765
System and Method for Input Pin Esd Protection with Floating and/or Biased Polysilicon Regions
Patent: 8,319,286 →
Application: 12/979,306 →
Publication: US 2012/0001261
Related Assignments (19)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Aug 27, 2004
From: CHAO, CHU CHU
To: SEMICONDUCTOR MANUFACTURING
Reel/Frame 015743/0643 →
Assignment of Assignor's Interest Jan 17, 2006
From: ANG, TING CHEONG
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 017465/0917 →
Assignment of Assignor's Interest Nov 17, 2006
From: XIAO, DEYUAN; SENG, TAN LEONG
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 018532/0591 →
Assignment of Assignor's Interest Mar 2, 2007
From: SU, TING CHIEH; LIAO, CHIN CHANG; HUANG, JUN CHENG
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 018993/0946 →
Assignment of Assignor's Interest Apr 4, 2007
From: HUO, JIE GUANG; YANG, JIANPING
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 019115/0348 →
Assignment of Assignor's Interest Jun 25, 2007
From: WU, JINGANG; LUO, FEI; GAO, GUANQIE; YANG, CHENG
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 019472/0084 →
Assignment of Assignor's Interest Aug 17, 2007
From: SHI, WEN; RUAN, WEI WEI
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 019734/0974 →
Assignment of Assignor's Interest Aug 27, 2007
From: JENG, MINI CHIE
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 019780/0736 →
Assignment of Assignor's Interest Jan 24, 2008
From: XIN, CHUN YAN
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 020412/0065 →
Assignment of Assignor's Interest Feb 20, 2008
From: HAN, TAO; FAN, JIANGUO
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 020537/0195 →
Assignment of Assignor's Interest Feb 25, 2008
From: HUANG, HERB; FUMITAKE, MIENO
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 020556/0981 →
Assignment of Assignor's Interest Mar 7, 2008
From: XIANG, YANG HUI
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 020618/0757 →
Assignment of Assignor's Interest Oct 24, 2008
From: ANG, TING CHEONG
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 021737/0005 →
Assignment of Assignor's Interest Oct 24, 2008
From: LEE, CHIA HAO
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 021737/0075 →
Assignment of Assignor's Interest Jan 8, 2009
From: MIENO, FUMITAKE
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 022079/0024 →
Assignment of Assignor's Interest Jan 12, 2009
From: MIENO, FUMITAKE
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 022089/0128 →
Assignment of Assignor's Interest Feb 23, 2009
From: MIENO, FUMITAKE
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 022294/0941 →
Assignment of Assignor's Interest Mar 3, 2009
From: GAO, DAVID; ZHU, BEI; WU, HANMING; CHEN, JOHN
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 022339/0365 →
Assignment of Assignor's Interest Mar 23, 2010
From: CHANG, YAN WU; LIM, TEK SING
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 024125/0607 →