IP Library Granted Patent US 8,242,017
Granted Patent B2
US 8,242,017 · App. 12/044,254 · Granted Aug 14, 2012

Method and structure for copper gap fill plating of interconnect structures for semiconductor integrated circuits

Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
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Quick Facts
Patent No.
US 8,242,017
App. No.
12/044,254
Granted
Aug 14, 2012
Kind
B2
Abstract

A method for forming an integrated circuit device including an interconnect structure, e.g., copper dual damascene. The method includes providing a substrate and forming an interlayer dielectric layer overlying the substrate. The method also includes patterning the interlayer dielectric layer to form a contact structure and forming a barrier metal layer overlying the contact structure. The method includes forming a seed layer comprising copper bearing species overlying the barrier metal layer and applying an oxygen bearing species to treat the seed layer to cause an oxide layer of predetermined thickness to form on the seed layer. The method protects the seed layer from contamination using the oxide layer while the substrate is transferred from the step of applying the seed layer and contacts a copper bearing material in liquid form overlying the oxide layer to dissolve the oxide layer while forming a thickness of copper bearing material using a plating process to begin filling the contact structure.

Claims (34)

1. A method for forming an interconnect structure, the method comprising:

providing a silicon substrate;

forming an interlayer dielectric layer overlying the silicon substrate;

patterning the interlayer dielectric layer to form a contact structure;

forming a barrier metal layer overlying the contact structure, the barrier metal layer having a thickness from about 50 Angstroms to about 500 Angstroms;

forming a seed layer comprising copper bearing species overlying the barrier metal layer;

applying an oxygen bearing species to treat the seed layer to cause an oxide layer of predetermined thickness to form on the seed layer;

protecting the seed layer from contamination using the oxide layer while the substrate is transferred from the step of applying the seed layer, wherein contaminants are attached to surfaces of the oxide layer during the substrate transfer; and

contacting a copper bearing material overlying the oxide layer to dissolve the oxide layer into ionic copper and water while forming a thickness of copper bearing material to fill the contact structure, wherein the dissolving of the oxide layer removes the contaminants.

2. The method of claim 1 wherein the seed layer is deposited using physical vapor deposition or chemical vapor deposition.

3. The method of claim 1 wherein the seed layer is about 500 Angstroms to about 2000 Angstroms.

4. The method of claim 1 wherein the copper bearing material is electro-plated.

5. The method of claim 1 wherein the copper bearing material is provided in a damascene structure.

6. The method of claim 1 wherein the oxygen is derived from gaseous oxygen.

7. The method of claim 1 wherein the forming the seed layer and applying the oxygen bearing species are provided without breaking vacuum.

8. The method of claim 1 wherein the barrier metal layer is tantalum, tantalum nitride, or like materials.

9. The method of claim 1 wherein the interlayer dielectric is a low k dielectric material.

10. A method for forming an integrated circuit device including an interconnect structure, the method comprising:

providing a substrate;

forming an interlayer dielectric layer overlying the substrate;

patterning the interlayer dielectric layer to form a contact structure;

forming a barrier metal layer overlying the contact structure, the barrier metal layer having a thickness from about 50 Angstroms to about 500 Angstroms;

forming a seed layer comprising copper bearing species overlying the barrier metal layer;

applying an oxygen bearing species to treat the seed layer to cause an oxide layer of predetermined thickness to form on the seed layer;

protecting the seed layer from contamination using the oxide layer while the substrate is transferred from the step of applying the seed layer, wherein contaminants are attached to surfaces of the oxide layer during the substrate transfer; and

contacting a copper bearing material overlying the oxide layer to dissolve the oxide layer into ionic copper and water while forming a thickness of copper bearing material to fill the contact structure, wherein the dissolving of the oxide layer removes the contaminants.

11. The method of claim 10 wherein the seed layer is deposited using physical vapor deposition or chemical vapor deposition.

12. The method of claim 10 wherein the seed layer is about 500 Angstroms to about 2000 Angstroms.

13. The method of claim 10 wherein the copper bearing material is electro-plated.

14. The method of claim 10 wherein the copper bearing material is provided in a damascene structure.

15. The method of claim 10 wherein the oxygen is derived from gaseous oxygen.

16. The method of claim 10 wherein the forming the seed layer and applying the oxygen bearing species are provided without breaking vacuum.

17. The method of claim 10 wherein the barrier metal layer is tantalum, tantalum nitride, or like materials.

18. The method of claim 10 wherein the interlayer dielectric is a low k dielectric material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2013
From: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION; SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
Reel/Frame 029625/0763 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2008
From: XIANG, YANG HUI
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 020618/0757 →
Continuity (1)
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