IP Library Granted Patent US 8,452,999
Granted Patent B2
US 8,452,999 · App. 12/810,172 · Granted May 28, 2013

Performance estimation for adjusting processor parameter to execute a task taking account of resource available task inactive period

Inventors: Andy Barth (Aston Clinton, GB); Daniele Dall'Acqua (Aylesbury, GB); Nigel Drew (Calne, GB)
Assignee: Freescale Semiconductor, Inc.
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Quick Facts
Patent No.
US 8,452,999
App. No.
12/810,172
Granted
May 28, 2013
Kind
B2
Abstract

A method of processing data using a data processor having an operating system for performing tasks of an application program, and a power and performance controller controlling parameters and modes of execution of the tasks by the data processor. The power and performance controller includes a performance predictor producing an estimation of required performance of the data processor for the tasks taking account of inactive periods of the tasks and adjusting the performance and power consumption of the data processor in response to the estimation. The performance predictor distinguishes for each of the tasks between: —available inactive periods of the task during which the operating system is available to continue to process the same task, and—unavailable inactive periods of the task during which the operating system is not available to continue to process the same task. A substantial improvement is obtained in quality of service, with fewer missed deadlines in performance of the tasks.

Claims (30)

1. Data processing apparatus comprising:

a data processor having an operating system to perform tasks of an application program; and

a power and performance controller to control parameters and modes of execution of said tasks by said data processor, said power and performance controller including a performance predictor to calculate an estimation of required performance of said data processor for said tasks taking account of inactive periods of said tasks, and to adjust the parameters and modes of execution of said tasks by said data processor in response to said estimation;

said performance predictor being arranged to distinguish for each of said tasks between: —

available inactive periods of said data processor during which said data processor was available to process a same task, said available inactive periods are included in calculating said estimation of required performance for the same task, and

unavailable inactive periods of said data processor during which said data processor was not available to process the same task and other tasks, and unavailable active periods of said data processor during which said data processor was not available to process the same task but was processing other tasks, said unavailable inactive periods and unavailable active periods are not included in calculating said estimation of required performance for the same task.

2. Data processing apparatus as claimed in claim 1 , wherein said data processor is responsive to unavailable inactive periods for a task to switch the operating system to another task if not blocked by the inactive task, or to an idle mode if no other task is ready to be processed.

3. Data processing apparatus as claimed in claim 1 , wherein said power and performance controller is responsive to said available inactive periods but not to said unavailable periods for a task in calculating said estimation for that task.

4. Data processing apparatus as claimed in claim 1 , wherein said tasks include input/output accesses, and said power and performance controller is responsive to said input/output accesses of a task to exclude corresponding inactive periods in calculating said estimation for that task.

5. Data processing apparatus as claimed in claim 1 , wherein said power and performance controller is responsive to a decaying average of workload for a task in calculating said estimation for that task.

6. Data processing apparatus as claimed in claim 1 , wherein said power and performance controller is arranged to adjust clock frequency and or supply voltage for said data processor in adjusting the performance and power consumption of said data processor in response to said estimation.

7. Data processing apparatus as claimed in claim 2 , wherein said power and performance controller is responsive to said available inactive periods but not to said unavailable periods for a task in calculating said estimation for that task.

8. Data processing apparatus as claimed in claim 2 , wherein said tasks include input/output accesses, and said power and performance controller is responsive to said input/output accesses of a task to exclude corresponding inactive periods in calculating said estimation for that task.

9. Data processing apparatus as claimed in claim 3 , wherein said tasks include input/output accesses, and said power and performance controller is responsive to said input/output accesses of a task to exclude corresponding inactive periods in calculating said estimation for that task.

10. Data processing apparatus as claimed in claim 2 , wherein said power and performance controller is responsive to a decaying average of workload for a task in calculating said estimation for that task.

11. Data processing apparatus as claimed in claim 3 , wherein said power and performance controller is responsive to a decaying average of workload for a task in calculating said estimation for that task.

12. Data processing apparatus as claimed in claim 4 , wherein said power and performance controller is responsive to a decaying average of workload for a task in calculating said estimation for that task.

13. Data processing apparatus as claimed in claim 2 , wherein said power and performance controller is arranged to adjust clock frequency and or supply voltage for said data processor in adjusting the performance and power consumption of said data processor in response to said estimation.

14. Data processing apparatus as claimed in claim 3 , wherein said power and performance controller is arranged to adjust clock frequency and or supply voltage for said data processor in adjusting the performance and power consumption of said data processor in response to said estimation.

15. A method of processing data using a data processor having an operating system for performing tasks of an application program, and a power and performance controller controlling parameters and modes of execution of said tasks by said data processor, said power and performance controller including a performance predictor; the method comprising:

calculating by said performance predictor an estimation of required performance of said data processor for said tasks taking account of inactive periods of said tasks; and

adjusting by said performance predictor the performance and power consumption of said data processor in response to said estimation;

distinguishing by said performance predictor for each of said tasks between: —

available inactive periods of said data processor during which said data processor is available to continue to process a same task, said available inactive periods are included in calculating said estimation of required performance for the same task, and

unavailable inactive periods of said data processor during which said data processor was not available to process the same task and other tasks, and unavailable active periods of said data processor during which said data processor was not available to process the same task but was processing other tasks, said unavailable inactive periods and unavailable active periods are not included in calculating said estimation of required performance for the same task.

16. A method of processing data as claimed in claim 15 , wherein said data processor is responsive to unavailable inactive periods for a task to switch the operating system to another task if not blocked by the inactive task, or to an idle mode if no other task is ready to be processed.

17. A method of processing data as claimed in claim 15 , wherein said power and performance controller responds to said available inactive periods but not to said unavailable periods for a task in calculating said estimation for that task.

18. A method of processing data as claimed in claim 15 , wherein said tasks include input/output accesses, and said power and performance controller responds to said input/output accesses of a task to exclude corresponding inactive periods in calculating said estimation for that task.

19. Data processing apparatus as claimed in claim 1 , wherein said power and performance controller responds to a decaying average of workload for a task in calculating said estimation for that task.

20. Data processing apparatus as claimed in claim 1 , wherein said power and performance controller adjusts clock frequency and or supply voltage for said data processor in adjusting the performance and power consumption of said data processor in response to said estimation.

Assignments (32)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2020
From: VLSI TECHNOLOGY, LLC
To: NXP USA, INC.
Reel/Frame 051439/0567 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027621/0928 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0477 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2010
From: BARTH, ANDY; DALL' ACQUA, DANIELE; DREW, NIGEL
To: FREESCALE SEMICONDUCTOR INC.
Reel/Frame 024579/0767 →
Continuity (1)
Related Publication 20100287396A1 · Nov 11, 2010