Multi-layer TSV insulation and methods of fabricating the same
Provided is a semiconductor device. The semiconductor device may include a substrate and a stacked insulation layer on a sidewall of an opening which penetrates the substrate. The stacked insulation layer can include at least one first insulation layer and at least one second insulation layer whose dielectric constant is different than that of the first insulation layer. One insulation layer may be a polymer and one insulation layer may be a silicon based insulation layer. The insulation layers may be uniform in thickness or may vary as a distance from the substrate changes.
1. A semiconductor device, comprising:
a substrate; and
a stacked insulation layer on a sidewall of an opening which penetrates the substrate,
wherein the stacked insulation layer comprises at least one first insulation layer and at least one second insulation layer whose dielectric constant is different from that of the first insulation layer, wherein one insulation layer comprises a polymer and the other comprises a silicon based dielectric, and wherein a thickness of the first insulation layer at an upper part of the opening is smaller than a thickness of the first insulation layer at a lower part of the opening and a thickness of the second insulation layer at a lower part of the opening is smaller than a thickness of the second insulation layer at the upper of the opening.
2. The semiconductor device of claim 1 , wherein the second insulation layer comprises a CF-based polymer.
3. The semiconductor device of claim 1 , wherein the first insulation layer comprises at least one material selected from the list including silicon oxide, silicon oxinitride, or silicon nitride.
4. The semiconductor device of claim 1 , further comprising a conductor substantially filling an opening in the stacked insulation layer.
5. The semiconductor device of claim 4 , further comprising a barrier layer between the conductor and the stacked insulation layer.
6. The semiconductor device of claim 4 , further comprising a conductive region electrically connected to the conductor at a bottom surface of the opening.
7. The semiconductor device of claim 1 , wherein the stacked insulation layer has a constant thickness from the upper part to the lower part of the opening.
8. The semiconductor device of claim 1 , wherein the thickness of the first insulation layer gradually increases from an upper surface to a lower surface of the substrate.
9. The semiconductor device of claim 1 , wherein the thickness of the second insulation layer gradually decreases from an upper surface to a lower surface of the substrate.
10. The semiconductor device of claim 1 , wherein the first insulation layer comprises a first portion having a constant thickness and a second portion having a gradually decreasing thickness from a lower surface of the substrate.
11. The semiconductor device of claim 1 , wherein the second insulation layer comprises a first portion having a constant thickness and a second portion having a gradually increasing thickness from a lower surface of the substrate.
12. A semiconductor device, comprising:
a substrate including an opening penetrating the substrate; and
a stacked insulation layer on a sidewall of the opening, wherein the stacked insulation layer comprises a first insulation layer comprising a polymer and a second insulation layer comprising a silicon based dielectric, and wherein one of the first and second insulation layers has a thickness gradually increasing from an upper surface to a lower surface of the substrate.
13. The semiconductor device of claim 12 , wherein another of the first and second insulation layers has a thickness gradually decreasing from the upper surface to the lower surface of the substrate.
14. The semiconductor device of claim 12 , wherein the stacked insulation layer has a constant thickness from the upper surface to the lower surface of the substrate.