IP Library Granted Patent US 8,772,139
Granted Patent B2
US 8,772,139 · App. 13/577,836 · Granted Jul 8, 2014

Method of manufacturing semiconductor device

Inventors: Toru Hiyoshi (Osaka, JP); Takeyoshi Masuda (Osaka, JP)
Assignee: Sumitomo Electric Industries, Ltd.
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Quick Facts
Patent No.
US 8,772,139
App. No.
13/577,836
Granted
Jul 8, 2014
Kind
B2
Abstract

A method of manufacturing a MOSFET includes the steps of preparing a silicon carbide substrate, forming an active layer on the silicon carbide substrate, forming a gate oxide film on the active layer, forming a gate electrode on the gate oxide film, forming a source contact electrode on the active layer, and forming a source interconnection on the source contact electrode. The step of forming the source interconnection includes the steps of forming a conductor film on the source contact electrode and processing the conductor film by etching the conductor film with reactive ion etching. Then, the method of manufacturing a MOSFET further includes the step of performing annealing of heating the silicon carbide substrate to a temperature not lower than 50° C. after the step of processing the conductor film.

Claims (18)

1. A method of manufacturing a semiconductor device, comprising the steps of:

preparing a substrate composed of silicon carbide;

forming an active layer on said substrate;

forming a gate insulating film on said active layer;

forming a gate electrode on said gate insulating film;

forming a contact electrode on said active layer, in contact with said active layer;

forming an interconnection on said contact electrode, in contact with said contact electrode,

said step of forming an interconnection including the steps of

forming a conductor film on said contact electrode, and

processing said conductor film by etching said conductor film with reactive ion etching;

forming a passivation film to cover said conductor film; and

performing annealing or heating said substrate to a temperature not lower than 50° C. to lower a leakage current after the step of processing said conductor film, wherein said step of annealing or heating said substrate is performed after said step of forming said passivation film.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein

in said step of performing annealing, said substrate is heated to a temperature not higher than 400° C.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein

reactive ion etching is not performed after said step of performing annealing.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein

said annealing is performed in an inert gas.

Assignments (2)
NUNC PRO TUNC ASSIGNMENT Recorded Jul 1, 2026
From: SUMITOMO ELECTRIC INDUSTRIES, LTD.
To: MITSUMI ELECTRIC CO., LTD.
Reel/Frame 075871/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2012
From: HIYOSHI, TORU; MASUDA, TAKEYOSHI
To: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Reel/Frame 028751/0192 →
Priority Claims (1)
JP 2011-001205 · Jan 6, 2011 · national
Continuity (1)
Related Publication 20120309174A1 · Dec 6, 2012