IP Library Granted Patent US 8,922,006
Granted Patent B2
US 8,922,006 · App. 13/559,840 · Granted Dec 30, 2014

Elongated bumps in integrated circuit devices

Inventors: Yen-Liang Lin (Taichung, TW); Chen-Shien Chen (Zhubei, TW); Tin-Hao Kuo (Hsin-Chu, TW); Sheng-Yu Wu (Hsin-Chu, TW); Tsung-Shu Lin (New Taipei, TW); Chang-Chia Huang (Hsin-Chu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,922,006
App. No.
13/559,840
Granted
Dec 30, 2014
Kind
B2
Abstract

A device includes a substrate, a metal pad over the substrate, and a passivation layer covering edge portions of the metal pad. The passivation layer has a first opening overlapping the metal pad, wherein the first opening has a first lateral dimension measured in a direction parallel to a major surface of the substrate. A polymer layer is over the passivation layer and covering the edge portions of the metal pad. The polymer layer has a second opening overlapping the metal pad. The second opening has a second lateral dimension measured in the direction. The first lateral dimension is greater than the second lateral dimension by more than about 7 μm. A Under-Bump metallurgy (UBM) includes a first portion in the second opening, and a second portion overlying portions of the polymer layer.

Claims (36)

1. A device comprising:

a substrate;

a metal pad over the substrate;

a passivation layer covering edge portions of the metal pad, wherein the passivation layer comprises a first opening overlapping the metal pad, and wherein the first opening has a first lateral dimension measured in a direction parallel to a major surface of the substrate;

a polymer layer over the passivation layer and covering the edge portions of the metal pad, wherein the polymer layer comprises a second opening overlapping the metal pad, wherein the second opening has a second lateral dimension measured in the direction, and wherein the first lateral dimension is greater than the second lateral dimension by more than about 7 μm;

a Under-Bump metallurgy (UBM) comprising a first portion in the second opening, and a second portion overlying portions of the polymer layer; and

a metal pillar over the UBM, wherein the metal pillar is formed of a non-solder metallic material, and wherein the metal pillar comprises vertical edges substantially perpendicular to a top surface of the metal pad.

2. The device of claim 1 , wherein the UBM has a third lateral dimension measured in the direction, and wherein the first lateral dimension is smaller than the third lateral dimension by more than about 2 μm.

3. The device of claim 1 further comprising a solder region over the metal pillar, with the solder region comprising a rounded top surface.

4. The device of claim 3 , wherein the metal pad, the passivation layer, the polymer layer, and the UBM are comprised in a device die, and wherein the metal pillar is bonded to a metal trace of a package substrate through a bump-on-trace bond, wherein the solder region bonding the metal pillar to the metal trace is in contact with opposite sidewalls of the metal trace.

5. The device of claim 1 , wherein the UBM has an elongated top-view shape and comprises a length and a width smaller than the length, and wherein the direction is parallel to a lengthwise direction of the UBM.

6. The device of claim 1 , wherein the UBM has an elongated top-view shape and comprises a length and a width smaller than the length, and wherein the direction is parallel to a widthwise direction of the UBM.

7. The device of claim 1 , wherein the first opening, the second opening, and the UBM have elongated top-view shapes.

8. A device comprising:

a substrate;

a metal pad over the substrate;

a passivation layer covering edge portions of the metal pad, wherein the passivation layer comprises a first opening overlapping the metal pad, and wherein the first opening has a first lateral dimension measured in a direction parallel to a major surface of the substrate;

a polymer layer over the passivation layer and covering the edge portions of the metal pad, wherein the polymer layer comprises a second opening overlapping the metal pad;

a Under-Bump metallurgy (UBM) comprising a first portion in the second opening, and a second portion overlying portions of the polymer layer, wherein the UBM has a second lateral dimension measured in the direction, and wherein the first lateral dimension is smaller than the second lateral dimension by more than about 2 μm; and

a metal pillar over the UBM, wherein edges of the metal pillar are aligned to respective edges of the UBM, and wherein the metal pillar is formed of a non-solder metallic material.

9. The device of claim 8 , wherein the second opening has a third lateral dimension measured in the direction, and wherein the first lateral dimension is greater than the third lateral dimension by more than about 7 μm.

10. The device of claim 8 , wherein the metal pad, the passivation layer, the polymer layer, and the UBM are comprised in a device die, and wherein the metal pillar is bonded to a metal trace of a package substrate through a bump-on-trace bonding, wherein a solder region bonding the metal pillar to the metal trace is in contact with opposite sidewalls of the metal trace.

11. The device of claim 8 , wherein the UBM has an elongated top-view shape with a length and a width smaller than the length, and wherein the direction is parallel to a lengthwise direction of the UBM.

12. The device of claim 8 , wherein the UBM has an elongated top-view shape with a length and a width smaller than the length, and wherein the direction is parallel to a widthwise direction of the UBM.

13. The device of claim 8 , wherein the first opening, the second opening, and the UBM have elongated top-view shapes.

14. A device comprising:

a substrate;

a metal pad over the substrate;

a passivation layer covering edge portions of the metal pad, wherein the passivation layer comprises a first opening, with a portion of the metal pad being disposed underlying the first opening, and wherein the first opening has a first length and a first width measured in a first direction and a second direction, with the first and the second directions parallel to a major surface of the substrate;

a polymer layer over the passivation layer and covering the passivation layer, wherein the polymer layer comprises a second opening, with the portion of the metal pad being disposed underlying the second opening, wherein the second opening has a second length and a second width measured in the first direction and the second direction, respectively, and wherein the first length is greater than the second length by more than about 7 μm, and the first width is greater than the second width by more than about 7 μm;

a Under-Bump metallurgy (UBM) comprising a first portion in the second opening, and a second portion over a portion of the polymer layer, wherein the UBM has a third length and a third width measured in the first direction and the second direction, respectively, and wherein the first length is smaller than the third length by more than about 2 μm, and the first width is smaller than the third width by more than about 2 μm; and

a metal pillar over the UBM, wherein edges of the metal pillar are aligned to respective edges of the UBM, and wherein the metal pillar is formed of a non-solder metallic material.

15. The device of claim 14 , wherein the first, the second, and the third lengths are greater than the first, the second, and the third widths, respectively.

16. The device of claim 14 further comprises a low-k dielectric layer underlying the metal pad.

17. The device of claim 14 , wherein the UBM comprises copper.

18. The device of claim 14 , wherein the metal pad, the passivation layer, the polymer layer, and the UBM are comprised in a device die, and wherein the metal pillar is bonded to a metal trace of a package substrate through a bump-on-trace bond, wherein a solder region bonding the metal pillar to the metal trace is in contact with opposite sidewalls of the metal trace.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2024
From: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
To: PARABELLUM STRATEGIC OPPORTUNITIES FUND LLC
Reel/Frame 068326/0474 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2012
From: LIN, YEN-LIANG; CHEN, CHEN-SHIEN; KUO, TIN-HAO; WU, SHENG-YU; LIN, TSUNG-SHU; HUANG, CHANG-CHIA
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 029432/0679 →
Continuity (2)
Provisional Application 61617480 · Mar 29, 2012
Related Publication 20130256874A1 · Oct 3, 2013