IP Library › Granted Patent US 8,951,842
Granted Patent B2
US 8,951,842 · App. 13/349,432 · Granted Feb 10, 2015

Semiconductor growth substrates and associated systems and methods for die singulation

Inventors: Xiaolong Fang (Boise, ID); Lifang Xu (Boise, ID); Tingkai Li (Camas, WA); Thomas Gehrke (Boise, ID)
Assignee: Micron Technology, Inc.
H01L33/48H01L22/10H01L23/544H01L33/007H01L33/0095H01L22/34H01L21/78
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Quick Facts
Patent No.
US 8,951,842
App. No.
13/349,432
Granted
Feb 10, 2015
Kind
B2
Abstract

Semiconductor growth substrates and associated systems and methods for die singulation are disclosed. A representative method for manufacturing semiconductor devices includes forming spaced-apart structures at a dicing street located between neighboring device growth regions of a substrate material. The method can further include epitaxially growing a semiconductor material by adding a first portion of semiconductor material to the device growth regions and adding a second portion of semiconductor material to the structures. The method can still further include forming semiconductor devices at the device growth regions, and separating the semiconductor devices from each other at the dicing street by removing the spaced-apart structures and the underlying substrate material at the dicing street.

Claims (42)

1. A method for manufacturing LEDs, comprising:

applying an aluminum nitride seed material to a growth substrate to form multiple LED growth regions with a dicing street between neighboring growth regions;

at the dicing street, removing portions of the seed material to expose the growth substrate, leaving spaced-apart dummy structures at the dicing street;

epitaxially growing gallium nitride on the aluminum nitride seed material by:

adding a first portion of gallium nitride to the growth regions; and

adding a second portion of gallium nitride to the spaced-apart structures, wherein

the second portion of the gallium nitride would otherwise be disposed at the device growth regions in the absence of the spaced-apart structures;

forming LEDs with the gallium nitride at the growth regions; and

separating the LEDs from each at the dicing street by removing the dummy structures and the underlying growth substrate at the dicing street.

2. The method of claim 1 wherein forming the spaced-apart structures includes forming a first structure closest to one of the growth regions, and wherein the first structure is spaced apart from the one growth region by a distance of from about 5 microns to about 15 microns.

3. The method of claim 1 wherein forming the spaced-apart structures includes forming a first structure closest to one of the growth regions, and wherein the first structure is spaced apart from the one device growth region by an offset distance, and wherein the offset distance is different for a lateral LED structure than for a vertical LED structure.

4. The method of claim 1 wherein adding a first portion of gallium nitride to the growth regions includes, for an individual growth region, adding the first portion to have a generally uniform thickness across the individual device growth region, from one edge to another.

5. A method for manufacturing semiconductor devices, comprising:

forming spaced-apart dummy structures at a dicing street located between neighboring device growth regions of a substrate material;

epitaxially growing gallium nitride by:

adding a first portion of the gallium nitride to aluminum nitride at the device growth regions; and

adding a second portion of the gallium nitride to aluminum nitride at the dummy structures;

forming LEDs with the gallium nitride at the device growth regions; and

separating the semiconductor devices from each other at the dicing street by removing the spaced-apart structures and the underlying substrate material at the dicing street.

6. The method of claim 5 wherein adding the second portion of gallium nitride includes attracting to the spaced-apart structures gallium nitride that would otherwise nucleate at an edge of a device growth region.

7. The method of claim 5 wherein forming spaced-apart structures includes removing portions of material at the dicing street to expose the substrate material, leaving spaced-apart structures at the dicing street.

8. The method of claim 5 wherein forming spaced-apart structures includes:

applying a mask to the substrate material;

removing the mask from multiple device growth regions and from spaced-apart regions at the dicing street between neighboring device growth regions; and

applying an aluminum nitride seed material to the device growth regions and the spaced-apart regions of the dicing street to form spaced-apart structures at the dicing street.

9. The method of claim 5 , further comprising:

forming a test structure at the dicing street with at least one of the spaced-apart structures; and

performing a test using the test structure before separating the LEDs.

10. The method of claim 5 wherein separating the LEDs includes sawing the underlying substrate material.

11. The method of claim 5 wherein adding the first portion of the gallium nitride to the device growth regions includes, for an individual region, adding the first portion of the gallium nitride to have a generally uniform distribution across the individual region.

12. The method of claim 11 wherein the gallium nitride at the device growth region has a first thickness away from the dicing street and a second thickness adjacent to the dicing street, and wherein the first and second thicknesses are at least approximately equal.

13. The method of claim 5 wherein forming the spaced-apart structures includes forming a first structure closest to one of the device growth regions, and wherein the first structure is spaced apart from the one device growth region by a distance of from about 5 microns to about 15 microns.

14. A method for manufacturing solid state transducers, comprising:

applying a mask to a substrate material;

removing the mask from multiple device growth regions and from spaced-apart regions in a dicing street between neighboring device growth regions;

applying an aluminum nitride seed material to the device growth regions and the spaced-apart regions of the dicing street to form spaced-apart structures at the dicing street;

epitaxially growing gallium nitride on the aluminum nitride seed material by:

adding a first portion of gallium nitride to the device growth regions; and

adding a second portion of gallium nitride material to the dummy structures, wherein the second portion of the gallium nitride would otherwise be disposed at the device growth regions in the absence of the spaced-apart structures;

forming solid state transducers with the gallium nitride at the device growth regions; and

separating the solid state transducers from each at the dicing street by removing the spaced-apart structures and the underlying substrate material at the dicing street.

15. The method of claim 14 wherein forming solid state transducers includes forming LEDs.

Assignments (10)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2012
From: XU, LIFANG; GEHRKE, THOMAS
To: MICRON TECHNOLOGY, INC.
Reel/Frame 028855/0260 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2012
From: LI, TINGKAI
To: MICRON TECHNOLOGY, INC.
Reel/Frame 028855/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2012
From: FANG, XIAOLONG
To: MICRON TECHNOLOGY, INC.
Reel/Frame 028855/0318 →
Continuity (1)
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