System, method and computer program product for scheduling a processing entity task by a scheduler in response to a peripheral task completion indicator
A system, computer program and a method for scheduling a processing entity task in a multiple-processing entity system, the method includes initializing a scheduler; receiving a task data structure indicative that a pre-requisite to an execution of task to be executed by a processing entity is a completion of a peripheral task that is executed by a peripheral; wherein the peripheral updates a peripheral task completion indicator once the peripheral task is completed; wherein the peripheral task completion indicator is accessible by the scheduler; and scheduling, by the scheduler, the task in response to the peripheral task completion indicator.
1. A method for scheduling a processing entity task for execution by a processing entity of multiple processing entities in a multiple-processing entity system, the multiple-processing entity system comprising a scheduler, the method comprising:
initializing the scheduler by performing initialization selected from a group consisting of: powering up the multiple-processing entity system, resetting the scheduler, and providing initializing information to the scheduler;
receiving at the scheduler a task data structure comprising a pre-requisite indicator indicative that a pre-requisite to an execution of the processing entity task to be executed by the processing entity is a completion of a peripheral task that is executed by a hardware peripheral, wherein the hardware peripheral updates a peripheral task completion indicator once the peripheral task is completed, wherein the peripheral task completion indicator is stored in a memory unit accessible to the scheduler and to the hardware peripheral;
scheduling by the scheduler, the processing entity task in response to the peripheral task completion indicator; and
updating a compact pre-requisite completion data structure stored in the memory unit, wherein a first portion of the compact pre-requisite completion data structure is accessible by the hardware peripheral and wherein another portion of the compact pre-requisite completion data structure is accessible by at least one processing entity of the multiple-processing entities of the multiple-processing entity system.
2. The method according to claim 1 comprising accessing, by the scheduler, the peripheral task completion indicator, in a non-interruptible manner.
3. The method according to claim 1 comprising scheduling the task in response to the peripheral task completion indicator and in response to at least one processing entity responsive pre-requisite indicator, wherein the at least one processing entity responsive pre-requisite indicator is responsive, directly or indirectly, to updating by at least one processing entity of the multiple-processing entity system.
4. The method according to claim 1 comprising disabling the scheduler from performing a non-scheduler task during the scheduling of the processing entity task, wherein the scheduler is a multiple-purpose entity.
5. A multiple-processing entity system comprising:
a memory unit, being a physical device, configured to store a task data structure comprising a pre-requisite indicator indicative that a pre-requisite to an execution of a processing entity task to be executed by a processing entity of multiple processing entities of the multiple-processing entity system is a completion of a peripheral task that is executed by a hardware peripheral;
wherein the hardware peripheral updates a peripheral task completion indicator stored in the memory unit once the peripheral task is completed; and
a scheduler, configured to schedule the processing entity task for execution by the processing entity in response to the peripheral task completion indicator; wherein the peripheral task completion indicator is accessible by the scheduler and by the hardware peripheral, wherein the system is configured to update a compact pre-requisite completion data structure stored in the memory unit, wherein a first portion of the compact pre-requisite completion data structure is accessible by the hardware peripheral and wherein another portion of the compact pre-requisite completion data structure is accessible by at least one processing entity of the multiple-processing entity of the multiple-processing entity system.
6. The system of claim 5 wherein the scheduler is configured to access the peripheral task completion indicator, in a non-interruptible manner.
7. The system of claim 5 wherein the scheduler is configured to schedule the task in response to the peripheral task completion indicator and in response to at least one processing entity responsive pre-requisite indicator, wherein the at least one processing entity responsive pre-requisite indicator is responsive, directly or indirectly, to updating by at least one processing entity of the multiple-processing entity system.
8. The system of claim 6 wherein the scheduler is configured to update a pre-requisite completion vector in the pre-requisite completion data structure, wherein a first portion of the vector is accessible by the hardware peripheral and wherein another portion of the vector is accessible by at least one processing entities out of the multiple-processing entity of the multiple-processing entity system.
9. The system of claim 6 wherein the scheduler configured to move the task data structure from a pending task queue to a ready for execution task queue once all pre-requisites to the execution of the task are fulfilled.
10. The system of claim 6 wherein the scheduler is a multiple-purpose entity that is disabled from performing a non-scheduler task during the scheduling of the processing entity task.
11. The system of claim 6 wherein a processing entity is configured to instruct the hardware peripheral to update the peripheral task completion indicator once the peripheral task is completed.
12. The system of claim 6 wherein the processing entity is a core.
13. The multiple-processing entity system of claim 5 , wherein the hardware peripheral is selected from a group consisting of a Direct Memory Access engine and a Digital Signal Processing accelerator.
14. A computer program product comprising a non-transitory computer readable medium that stores instructions executable on a processor for:
receiving a task data structure comprising a pre-requisite indicator indicative that a pre-requisite to an execution of a processing entity task to be executed by a processing entity is a completion of a peripheral task that is executed by a hardware peripheral; wherein the hardware peripheral updates a peripheral task completion indicator once the peripheral task is completed; wherein the peripheral task completion indicator is accessible by a scheduler and by the hardware peripheral;
scheduling, by the scheduler, the processing entity task in response to the peripheral task completion indicator; and
updating a compact pre-requisite completion data structure, wherein a first portion of the compact pre-requisite completion data structure is accessible by the hardware peripheral and wherein another portion of the compact pre-requisite completion data structure is accessible by at least one processing entity of a multiple-processing entity of a multiple-processing entity system.
15. The computer program product according to claim 14 comprising instructions for accessing, by the scheduler, the peripheral task completion indicator, in a non-interruptible manner.
16. The computer program product according to claim 14 comprising instructions for scheduling the task in response to the peripheral task completion indicator and in response to at least one processing entity responsive pre-requisite indicator, wherein the at least one processing entity responsive pre-requisite indicator is responsive, directly or indirectly, to updating by at least one processing entity of the multiple-processing entity system.
17. The computer program product according to claim 14 comprising instructions for updating, by the scheduler, a pre-requisite completion vector, wherein a first portion of the vector is accessible by the hardware peripheral and wherein another portion of the vector is accessible by at least one processing entities out of the multiple-processing entity of the multiple-processing entity system.
18. The computer program product according to claim 14 comprising instructions for moving task data structure from a pending task queue to a ready for execution task queue once all pre-requisites to the execution of the task are fulfilled.
19. The computer program product according to claim 14 comprising instructions for instructing the hardware peripheral to update the peripheral task completion indicator once the peripheral task is completed.
20. The computer program product according to claim 14 comprising instructions for disabling the scheduler from performing a non-scheduler task during the scheduling of the processing entity task, wherein the scheduler is a multiple-purpose entity.