IP Library › Granted Patent US 8,987,058
Granted Patent B2
US 8,987,058 · App. 13/868,554 · Granted Mar 24, 2015

Method for wafer separation

Inventors: Yu-Peng Tsai (Taipei, TW); Wen-Hsiung Lu (Jhonghe, TW); Cheng-Ting Chen (Taichung, TW); Hsien-Wei Chen (Hsin-Chu, TW); Ming-Da Cheng (Jhubei, TW); Chung-Shi Liu (Hsin-Chu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L23/544H01L21/78H01L23/28
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Quick Facts
Patent No.
US 8,987,058
App. No.
13/868,554
Granted
Mar 24, 2015
Kind
B2
Abstract

A plurality of macro and micro alignment marks may be formed on a wafer. The macro alignment marks may be formed in pairs at opposite edges of the wafer. The micro alignment marks may be formed to align to streets on the wafer along a first and second direction. A molding compound may be formed on the wafer. The macro alignment marks may be exposed from the molding compound. A pair of the micro alignment marks may be exposed from the molding compound at opposite ends of the streets along the first and the second direction. The wafer may be aligned to a dicing tool using pairs of the macro alignment marks. The dicing tool may be aligned to the streets using pairs of the micro alignment marks. The wafer may be diced using successive pairs of micro alignment marks along the first and second direction.

Claims (55)

1. A method of dicing a wafer, comprising:

forming a molding compound over the wafer, wherein one or more electrical connectors are exposed through the molding compound;

aligning a dicing tool to a first pair of first alignment marks along a first direction of the wafer, the first alignment marks having a first shape;

aligning the dicing tool to a second pair of second alignment marks along the first direction of the wafer, the second alignment marks having a second shape; and

dicing the wafer with the dicing tool along the first direction using the alignment of the second pair of second alignment marks.

2. The method of claim 1 , wherein the first shape is different from the second shape.

3. The method of claim 1 , further comprising:

updating the alignment for the dicing the wafer using a plurality of second alignment marks on the wafer along the first direction between the second pair of second alignment marks.

4. The method of claim 1 , further comprising:

after the dicing the wafer with the dicing tool along the first direction, aligning the dicing tool to a subsequent pair of second alignment marks along the first direction of the wafer;

dicing the wafer with the dicing tool along the first direction using the alignment of the subsequent pair of second alignment marks; and

repeating the aligning and dicing of subsequent pairs of second alignment marks along the first direction until the wafer has been diced along pairs of second alignment marks used for dicing along the first direction.

5. The method of claim 1 , wherein the first pair of first alignment marks are located near opposite edges of the wafer along the first direction.

6. The method of claim 1 , wherein the second pair of second alignment marks are located near opposite edges of the molding compound on the wafer along the first direction.

7. The method of claim 1 , wherein the first alignment marks are larger than the second alignment marks.

8. The method of claim 1 , wherein the forming the molding compound over the wafer further comprises:

applying the molding compound over the wafer; and

applying a pressure mold to the molding compound.

9. The method of claim 1 , further comprising:

aligning the dicing tool to a third pair of first alignment marks along a second direction of the wafer;

aligning the dicing tool to a fourth pair of second alignment marks along the second direction of the wafer; and

dicing the wafer with the dicing tool along the second direction using the alignment of the fourth pair of second alignment marks.

10. The method of claim 9 , further comprising:

updating the alignment for the dicing the wafer along the second direction using a plurality of second alignment marks on the wafer between the fourth pair of second alignment marks.

11. The method of claim 9 , further comprising:

after the dicing the wafer with the dicing tool along the second direction, aligning the dicing tool to a subsequent pair of second alignment marks along the second direction of the wafer;

dicing the wafer with the dicing tool along the second direction using the alignment of the subsequent pair of second alignment marks; and

repeating the aligning and dicing of subsequent pairs of second alignment marks along the second direction until the wafer has been diced along pairs of second alignment marks used for dicing along the second direction.

12. A method of dicing a wafer, comprising:

forming a first plurality of alignment marks on the wafer, the first plurality of alignment marks being formed in pairs at opposite edges of the wafer and having a first shape;

forming a second plurality of alignment marks on the wafer, the second plurality of alignment marks being aligned to streets between dies on the wafer and having a second shape;

forming a molding compound over the wafer, wherein one or more electrical connectors are exposed through the molding compound and wherein the first plurality of alignment marks and at least a pair of the second plurality of alignment marks are exposed from the molding compound;

dicing the wafer along a first direction of the streets using first successive pairs of the second alignment marks; and

dicing the wafer along a second direction of the streets using second successive pairs of the second alignment marks.

13. The method of claim 12 , wherein the first shape is different from the second shape.

14. The method of claim 12 , wherein the second plurality alignment marks extend along the streets between the dies on the wafer.

15. The method of claim 12 , further comprising:

prior to dicing the wafer along the first direction, performing a first alignment of the wafer using a first pair of the first plurality of alignment marks along the first direction.

16. The method of claim 12 , further comprising:

prior to dicing the wafer along the second direction, performing a second alignment of the wafer using a second pair of the first plurality of alignment marks along the second direction.

17. The method of claim 12 , wherein a distance between an edge of the wafer and an edge of the molding compound is greater than or equal to 1.5 mm and less than or equal to 4 mm.

18. The method of claim 12 , wherein the first plurality of alignment marks, the second plurality of alignment marks, the molding compound, and the one or more electrical connectors are each formed on a same side of the wafer.

19. A method comprising:

forming a first plurality of alignment marks on a wafer, the first plurality of alignment marks being formed in pairs at opposite edges of the wafer and having a first shape;

forming a second plurality of alignment marks on the wafer, the second plurality of alignment marks aligned with and extending along streets between dies on the wafer and having a second shape, the second shape being different than the first shape;

forming a molding compound over the wafer, wherein one or more electrical connectors are exposed through the molding compound and wherein the first plurality of alignment marks and at least a first pair of the second plurality of alignment marks are exposed from the molding compound; and

dicing the wafer along the streets using successive pairs of the second alignment marks.

20. The method of claim 19 further comprising:

updating an alignment for the dicing the wafer using a second pair of the second plurality of alignment marks between the at least the first pair of the second plurality of alignment marks.

21. The method of claim 19 , wherein the dicing the wafer further comprises:

dicing the wafer along a first direction of the streets using first successive pairs of the second alignment marks; and

dicing the wafer along a second direction of the streets using second successive pairs of the second alignment marks, the first direction being substantially perpendicular to the second direction.

22. The method of claim 21 , further comprising:

before the dicing the wafer along the first direction, performing a first alignment of the wafer using a first pair of the first plurality of alignment marks along the first direction; and

before the dicing the wafer along the second direction, performing a second alignment of the wafer using a second pair of the first plurality of alignment marks along the second direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2013
From: TSAI, YU-PENG; LU, WEN-HSIUNG; CHEN, CHENG-TING; CHEN, HSIEN-WEI; CHENG, MING-DA; LIU, CHUNG-SHI
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 030267/0964 →
Continuity (2)
Provisional Application 61778341 · Mar 12, 2013
Related Publication 20140264885A1 · Sep 18, 2014