IP Library Granted Patent US 9,059,021
Granted Patent B2
US 9,059,021 · App. 14/195,272 · Granted Jun 16, 2015

FinFET device

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Quick Facts
Patent No.
US 9,059,021
App. No.
14/195,272
Granted
Jun 16, 2015
Kind
B2
Abstract

A method for forming a field effect transistor device includes patterning an arrangement of fin portions on a substrate, patterning a gate stack portion over portions of the fin portions and the substrate, growing an epitaxial material from the fin portions that electrically connects portions of adjacent fin structures, and removing a portion of the gate stack portion to expose a portion of the substrate.

Claims (13)

1. A field effect transistor device comprising:

an arrangement of fin portions disposed on a substrate;

a first gate stack portion and a second gate stack portion arranged over the arrangement of fin portions and portions of the substrate;

a spacer, comprising a single material, formed over and adjacent to the first and second gate stack portions so as to completely cover top, side and edge surfaces of the first and second gate stack portions;

an oxide layer formed over the spacer and over exposed portions of the fin portions;

a first epitaxial material connecting portions of the fin portions arranged in a first region defined by a first side of the first gate stack portion;

a second epitaxial material connecting portions of the fin portions arranged in a second region defined by a second side of the first gate stack portion; and

the second gate stack portion arranged substantially collinear to the first gate stack portion, the first gate stack portion and the second gate stack portion partially defined by an exposed region of the substrate arranged between the first gate stack portion and the second gate stack portion.

2. The device of claim 1 , wherein the device further comprises a third gate stack portion arranged substantially parallel to the first gate stack portion and the second gate stack portion.

3. The device of claim 2 , wherein the region of the substrate arranged between the first gate stack portion and the second gate stack portion includes another oxide layer.

4. The device of claim 1 , wherein the fin portions are arranged substantially in parallel to each other.

5. The device of claim 1 , wherein the first gate stack portion is arranged substantially perpendicular to the fin portions.

6. The device of claim 1 , wherein the second gate stack portion is arranged substantially perpendicular to the fin portions.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2017
From: GLOBALFOUNDRIES INC.
To: AURIGA INNOVATIONS, INC.
Reel/Frame 041804/0940 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 036779/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 036550/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2014
From: BUTT, SHAHID A.; WONG, ROBERT C.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 032338/0307 →