Techniques for reducing inductance in through-die vias of an electronic assembly
An electronic assembly includes a processor die assembly, a first die assembly, and a second die assembly. The first die assembly is positioned on a first side of the processor die assembly. The second die assembly is positioned on a second side of the processor die assembly opposite the first side of the processor die assembly. Through-die vias couple the first and second die assemblies to the processor die assembly.
1. An electronic assembly, comprising:
one or more processor die assemblies;
a plurality of non-processor die assemblies; and
through-die vias coupling the plurality of non-processor die assemblies to each of a respective one of the one or more processor die assemblies and wherein the through-die vias include power vias, ground vias, address vias, data vias, and control vias;
wherein each processor die assembly of the one or more processor die assemblies has an even number of a same type of the plurality of non-processor die assemblies symmetrically positioned on a first side of the processor die assembly and a second side of the processor die assembly.
2. The electronic assembly of claim 1 , wherein the through-die vias include through-silicon vias.
3. The electronic assembly of claim 1 , wherein the plurality of non-processor die assemblies includes four memory die in a stacked configuration.
4. The electronic assembly of claim 1 , wherein the through-die vias are at least partially filled with copper.
5. The electronic assembly of claim 1 , wherein the through-die vias are at least partially filled with aluminum.
6. The electronic assembly of claim 1 , wherein the plurality of non-processor die assemblies include an equal number of memory die and the through-die vias extend through the one or more processor die assemblies and the plurality of non-processor die assemblies.
7. The electronic assembly of claim 1 , wherein the one or more processor die assemblies only include a single processor die.
8. An electronic assembly, comprising:
a plurality of processor die assemblies;
a plurality of non-processor die assemblies; and
through-silicon vias coupling the plurality of non-processor die assemblies to the plurality of processor die assemblies and wherein the through-silicon vias include power vias, ground vias, address vias, data vias, and control vias;
wherein at least two processor die assemblies of the plurality of processor die assemblies are stacked back to back; and
wherein the at least two processor die assemblies, stacked back to back, have an even number of a same type of the plurality of non-processor die assemblies symmetrically positioned on a first side of the at least two processor die assemblies, stacked back to back, and a second side of the at least two processor die assemblies, stacked back to back.
9. The electronic assembly of claim 8 , wherein the plurality of non-processor die assemblies includes a plurality of memory die.
10. The electronic assembly of claim 8 , wherein the through-silicon vias are at least partially filled with copper.
11. The electronic assembly of claim 8 , wherein the through-silicon vias are at least partially filled with aluminum.
12. The electronic assembly of claim 8 , wherein the plurality of non-processor die assemblies include an equal number of memory die and the through-silicon vias extend through the at least two processor die assemblies, stacked back to back.
13. An electronic assembly, comprising:
one or more first processor die assemblies;
a plurality of non-processor die assemblies; and
first through-silicon vias coupling at least a first two non-processor die assemblies of the plurality of non-processor die assemblies to a first processor die assembly of the one or more processor die assemblies, wherein each of the at least first two non-processor die assemblies of the plurality of non-processor die assemblies include a respective memory die, and wherein the first through-silicon vias include power vias, ground vias, address vias, data vias, and control vias;
wherein each processor die assembly of the one or more processor die assemblies has an even number of a same type of the plurality of non-processor die assemblies symmetrically positioned on a first side of the processor die assembly and a second side of the processor die assembly.
14. The electronic assembly of claim 13 , wherein the first through-silicon vias are at least partially filled with copper or aluminum.
15. The electronic assembly of claim 13 ,
wherein the one or more processor die assemblies include a second processor die assembly, wherein the one or more processor die processor die assemblies are included within a single wafer;
the electronic assembly further comprising:
second through-silicon vias coupling at least a second two non-processor die assemblies of the plurality of non-processor die assemblies to the second processor die assembly, wherein each of the at least second two non-processor die assemblies of the plurality of non-processor die assemblies include a respective memory die, and wherein the second through-silicon vias include power vias, ground vias, address vias, data vias, and control vias.
16. The electronic assembly of claim 15 , wherein the first and second through-silicon vias are at least partially filled with a conductor.
17. The electronic assembly of claim 1 , wherein at least two of the plurality of non-processor die assemblies include at least one of synchronous dynamic random access memory (SRAM) and double data rate (DDR) memory.
18. The electronic assembly of claim 8 , wherein at least two of the plurality of non-processor die assemblies include at least one of synchronous dynamic random access memory (SRAM) and double data rate (DDR) memory.
19. The electronic assembly of claim 13 , wherein at least two of the plurality of non-processor die assemblies include at least one of synchronous dynamic random access memory (SRAM) and double data rate (DDR) memory.