Granted Patent B1

US 9,158,921 · App. 14/274,770 · Granted Oct 13, 2015

Abstract

Claims (24)

1. A secure boot method of a processor for wake-up from a deep sleep mode, the method comprising:

reading a stored data structure to provide a plurality of verification data values;

retrieving a plurality of system data values from a memory storing system data, wherein the system data values are retrieved from memory locations distributed about the memory;

comparing, by a processor, each of the verification data values with corresponding system data values; and

resuming operation of the processor if a predetermined threshold of verification data values match the system data values;

the stored data structure comprises a plurality of verification data and address value pairs; wherein the stored data structure is encrypted;

decrypting a stored data encryption key with a secret key;

and

decrypting the stored data structure with the data encryption key.

2. The method of claim 1 , wherein the stored data structure provides, for each verification data value, an address in the memory of the corresponding system data value.

3. The method of claim 1 , further comprising retrieving the encrypted data encryption key from the memory.

4. The method of claim 1 , further comprising determining, from the stored data structure, a number of system data values to retrieve from the memory.

5. The method of claim 1 , wherein the stored data structure is encrypted, the method further comprising retrieving the encrypted data structure from the memory.

6. The method of claim 5 , further comprising retrieving, from a storage location within the processor, data indicative of a location in the memory of the encrypted data structure.

7. A processing system, comprising: a processor; a memory for storing system data;

a memory interface coupled to the processor and the memory enabling the processor to interface with the memory; and

a non-volatile memory for storing instructions for resuming operation from a low-power state, wherein the instructions cause the processor to execute a method, comprising:

a stored data structure comprises a plurality of verification data and address value pairs; wherein the stored data structure is encrypted;

decrypting a stored data encryption key with a secret key;

and

decrypting the stored data structure, with the data encryption key, to provide the plurality of verification data values;

retrieving a plurality of system data values from the memory, the system data values being retrieved from memory locations distributed about the memory;

comparing each of the verification data values with corresponding system data values; and

resuming operation if a predetermined threshold of verification data values matches the system data values.

Assignments (16)