IP Library Granted Patent US 9,263,335
Granted Patent B2
US 9,263,335 · App. 14/607,587 · Granted Feb 16, 2016

Discrete semiconductor device package and manufacturing method

Inventors: Tim Boettcher (Lauenbrueck, DE); Sven Walczyk (Waalre, NL); Roelf Anco Jacob Groenhuis (Nijmegen, NL); Rolf Brenner (Hamburg, DE); Emiel De Bruin (Elst, NL)
Assignee: NXP B.V.
H01L21/78H01L21/56H01L24/03H01L24/05H01L24/06H01L24/11H01L24/12H01L25/0657H01L25/50H01L24/13H01L24/16H01L24/29H01L24/32H01L24/33H01L24/81H01L2224/0346H01L2224/0401H01L2224/04026H01L2224/04105H01L2224/051H01L2224/05016H01L2224/05088H01L2224/05111H01L2224/05147H01L2224/05568H01L2224/05573H01L2224/05582H01L2224/05611H01L2224/05639H01L2224/05644H01L2224/06181H01L2224/13147H01L2224/16145H01L2224/20H01L2224/291H01L2224/32105H01L2224/32113H01L2224/32237H01L2224/33181H01L2224/9202H01L2224/94H01L2224/96H01L2225/06513H01L2225/06565H01L2924/00014H01L2924/10253H01L2924/12036
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Quick Facts
Patent No.
US 9,263,335
App. No.
14/607,587
Granted
Feb 16, 2016
Kind
B2
Abstract

Disclosed is a discrete semiconductor device package ( 100 ) comprising a semiconductor die ( 110 ) having a first surface and a second surface opposite said first surface carrying a contact ( 112 ); a conductive body ( 120 ) on said contact; an encapsulation material ( 130 ) laterally encapsulating said conductive body; and a capping member ( 140, 610 ) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap ( 150 ) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.

Claims (23)

1. A method of manufacturing a discrete semiconductor package, comprising:

providing a wafer comprising a plurality of discrete semiconductor devices, each of said discrete semiconductor devices having a first surface and a second surface opposite said first surface carrying a contact;

forming respective conductive bodies on each of said contacts;

covering at least the surface of the wafer carrying the conductive bodies with an encapsulating material;

singulating the discrete semiconductor devices;

providing a capping member over at least the conductive body of each of the discrete semiconductor devices;

wherein providing the capping member comprises providing a solder cap on each singulated discrete semiconductor device, device; and

the method further comprising providing a further solder cap over the first surface of each of the discrete semiconductor devices.

2. The method of claim 1 , further comprising thinning the wafer surface including the respective first surfaces of the discrete semiconductor devices prior to said singulation step.

3. The method of claim 1 , wherein said singulation step comprises dicing or plasma-etching the wafer to provide the discrete semiconductor devices.

4. The method of claim 1 , wherein the step of providing said capping member further comprises providing a further semiconductor wafer on said respective conductive bodies.

5. A method of manufacturing a discrete semiconductor package, comprising:

providing a wafer comprising a plurality of discrete semiconductor devices, each of said discrete semiconductor devices having a first surface and a second surface opposite said first surface carrying a contact;

forming respective conductive bodies on each of said contacts;

covering at least the surface of the wafer carrying the conductive bodies with an encapsulating material;

singulating the discrete semiconductor devices; and

providing a capping member over at least the conductive body of each of the discrete semiconductor devices;

partially singulating the discrete semiconductor devices prior to said covering step, thereby exposing the sides of each discrete semiconductor device that connect the first surface to the second surface; and

wherein said covering step further comprises covering said sides with the encapsulating material.

6. The method of claim 5 , further comprising:

placing the wafer on a sawing foil prior to said partial singulation step; and

stretching the sawing foil following said partial singulation step to expose the respective sides of the discrete semiconductor devices.

7. The method of claim 5 , wherein the partial singulation step comprises sawing the wafer with a sawing blade having a first thickness, and wherein said singulation step comprises sawing the encapsulated wafer with a sawing blade having a second thickness that is smaller than the first thickness.

Assignments (12)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 13, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 048328/0964 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2016
From: NXP B.V.
To: NEXPERIA B.V.
Reel/Frame 039610/0734 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2015
From: BOETTCHER, TIM; WALCZYK, SVEN; GROENHUIS, ROELF ANCO JACOB; BRENNER, ROLF; DE BRUIN, EMIEL
To: NXP B.V.
Reel/Frame 034832/0689 →
Priority Claims (1)
EP 12170528 · Jun 1, 2012 · regional
Continuity (2)
Division 13890055 · May 8, 2013
Related Publication 20150140739A1 · May 21, 2015