Multi-composition gate dielectric field effect transistors
A first gate structure and a second gate structure are formed over a semiconductor material layer. The first gate structure includes a planar silicon-based gate dielectric, a planar high-k gate dielectric, a metallic nitride portion, and a first semiconductor material portion, and the second gate structure includes a silicon-based dielectric material portion and a second semiconductor material portion. After formation of gate spacers and a planarization dielectric layer, the second gate structure is replaced with a transient gate structure including a chemical oxide portion and a second high-k gate dielectric. A work-function metal layer and a conductive material portion can be formed in each gate electrode by replacement of semiconductor material portions. A gate electrode includes the planar silicon-based gate dielectric, the planar high-k gate dielectric, and a U-shaped high-k gate dielectric, and another gate electrode includes the chemical oxide portion and another U-shaped high-k gate dielectric.
1. A semiconductor structure comprising a first field effect transistor and a second field effect transistor located on a semiconductor substrate, said first field effect transistor comprising a first gate structure and said second field effect transistor comprising a second gate structure,
wherein said first gate structure comprises a stack of a planar semiconductor oxide-based dielectric portion, a planar high dielectric constant (high-k) dielectric portion, and a first gate electrode, and
wherein said second gate structure comprises a stack of a chemical oxide layer contacting a surface of said semiconductor substrate, a U-shaped high-k dielectric portion, and a second gate electrode laterally surrounded by vertical portions of said U-shaped high-k dielectric portion.
2. The semiconductor structure of claim 1 , wherein said planar high-k dielectric portion has a different composition or a different thickness than said U-shaped high-k dielectric portion.
3. The semiconductor structure of claim 1 , wherein said semiconductor substrate comprises a semiconductor material, and said planar semiconductor oxide-based dielectric portion comprises a dielectric material selected from a dielectric oxide of said semiconductor material and a dielectric oxynitride of said semiconductor material.
4. The semiconductor structure of claim 1 , wherein said planar semiconductor oxide-based dielectric portion has a greater thickness than said chemical oxide layer.
5. The semiconductor structure of claim 1 , wherein said first gate electrode comprises a first U-shaped work function material portion and a first conductive material portion, and said second gate electrode comprises a second U-shaped work function material portion and a second conductive material portion.
6. The semiconductor structure of claim 5 , wherein said first and second U-shaped work function material portions have a same composition and a same thickness.
7. The semiconductor structure of claim 5 , wherein said first U-shaped work function material portion contacts a top surface of said planar high-k dielectric portion, and said second U-shaped work function material portion contacts said U-shaped high-k dielectric portion.
8. The semiconductor structure of claim 5 , wherein said first gate electrode further comprises a planar metallic material portion in contact with a top surface of said planar high-k dielectric portion and a bottom surface of said first U-shaped work function material portion.
9. The semiconductor structure of claim 8 , wherein said second gate electrode further comprises a U-shaped metallic material portion in contact with said U-shaped high-k dielectric portion and said second U-shaped work function material portion.
10. The semiconductor structure of claim 9 , wherein said planar metallic material portion and said U-shaped metallic material portion have different compositions or have different thicknesses.