IP Library Granted Patent US 9,431,396
Granted Patent B2
US 9,431,396 · App. 14/609,564 · Granted Aug 30, 2016

Single diffusion break with improved isolation and process window and reduced cost

Inventors: Hui Zang (Albany, NY); Bingwu Liu (Ballston Spa, NY)
Assignee: GLOBALFOUNDRIES INC.
H01L27/0886H01L21/0217H01L21/28035H01L21/32139H01L21/76224H01L21/823431H01L21/823437H01L21/823475H01L27/0207H01L29/1083H01L29/41758H01L29/66545
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Quick Facts
Patent No.
US 9,431,396
App. No.
14/609,564
Granted
Aug 30, 2016
Kind
B2
Abstract

Methods of forming a SDB with a partial or complete insulator structure formed over the SDB and resulting devices are provided. Embodiments include forming a SDB with a first width in a substrate; forming a first metal gate in an ILD on top of the SDB, with a second width larger than the first width; forming second and third metal gates in the ILD on the substrate on opposite sides of the first metal gate, the second and third metal gates laterally separated from the first metal gate; forming a photoresist over the second and third gates; removing the first metal gate down to the SDB, forming a cavity; removing the photoresist; and filling the cavity with an insulator layer.

Claims (15)

1. A method comprising:

forming a single diffusion break (SDB) with a first width in a substrate;

forming a first metal gate in an interlayer dielectric (ILD) on top of the SDB, with a second width larger than the first width;

forming second and third metal gates in the ILD on the substrate on opposite sides of the first metal gate, the second and third metal gates laterally separated from the first metal gate;

forming a photoresist over the second and third gates;

removing the first metal gate down to the SDB, forming a cavity;

removing the photoresist; and

filling the cavity with an insulator layer,

wherein each of the second and third metal gates is formed to a third width smaller than the second width.

2. The method according to claim 1 , further comprising:

etching each of the first, second, and third metal gates, forming a recess in each, prior to forming the photoresist; and

filling the recess in each of the second and third metal gates with the insulator layer concurrently with filling the cavity.

3. The method according to claim 2 , wherein source/drain (S/D) regions are formed on the substrate at opposite sides of each of the second and third metal gates, the method further comprising forming a self-aligned contact through the ILD down to the source/drain regions.

4. The method according to claim 1 , comprising forming the insulator layer of silicon nitride (SiN).

5. The method according to claim 1 , wherein the insulator layer is formed with a width greater than the first width and each of the third widths is smaller than the width of the insulator layer.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2015
From: ZANG, HUI; LIU, BINGWU
To: GLOBALFOUNDRIES INC.
Reel/Frame 034862/0575 →
Continuity (1)
Related Publication 20160225762A1 · Aug 4, 2016