IP Library › Granted Patent US 9,439,301
Granted Patent B2
US 9,439,301 · App. 13/902,521 · Granted Sep 6, 2016

Multilayered chip electronic component and board for mounting the same

Inventors: Byung Jun Jeon (Gyunggi-do, KR); Byoung Hwa Lee (Gyunggi-do, KR); Hyun Hee Gu (Gyunggi-do, KR); Chang Hoon Kim (Gyunggi-do, KR); Young Ghyu Ahn (Gyunggi-doSuwon, KR)
Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
H05K3/3442H01G2/065H01G4/232H05K2201/10636Y02P70/611Y02P70/613
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Quick Facts
Patent No.
US 9,439,301
App. No.
13/902,521
Granted
Sep 6, 2016
Kind
B2
Abstract

There is provided a multilayered chip electronic component including: a ceramic body including internal electrodes and dielectric layers; external electrodes covering both end surfaces of the ceramic body in a length direction; first plating layers forming the external electrodes and formed on outer surfaces of the ceramic body; non-conductive layers formed on outer side surfaces of the first plating layers; and second plating layers formed on regions of the first plating layers except for the non-conductive layers.

Claims (43)

1. A multilayered chip electronic component comprising:

a ceramic body including internal electrodes and dielectric layers;

external electrodes covering both end surfaces of the ceramic body in a length direction;

first plating layers forming the external electrodes and formed on outer surfaces of the ceramic body;

non-conductive layers formed on outer side surfaces of the first plating layers; and

second plating layers formed on regions of outer surfaces of the first plating layers except for the non-conductive layers,

wherein the non-conductive layers are formed on the outer side surfaces of the first plating layers except on outer surfaces of the second plating layers.

2. The multilayered chip electronic component of claim 1 , wherein at least one end portion of the non-conductive layers in a thickness direction is extended to a portion of at least one of an upper surface and a lower surface of the ceramic body as well as the outer side surface of the first plating layer.

3. The multilayered chip electronic component of claim 1 , wherein at least one end portion of the non-conductive layers in a thickness direction is formed in a position higher or lower than that of at least one of an upper surface and a lower surface of the ceramic body in the thickness direction.

4. The multilayered chip electronic component of claim 1 , wherein at least one end portion of the non-conductive layers in a thickness direction is formed in a position higher or lower than that of at least one of a lowermost internal electrode and an uppermost internal electrode among the internal electrodes formed in the ceramic body, in the thickness direction.

5. The multilayered chip electronic component of claim 1 , wherein the non-conductive layers include at least one selected from a group consisting of epoxy, a heat resistant polymer, glass, and a ceramic.

6. The multilayered chip electronic component of claim 1 , wherein the second plating layers are only formed in band portions of the external electrodes formed on the outer side surfaces, an upper surface, and a lower surface of the ceramic body except for the end surfaces of the ceramic body.

7. The multilayered chip electronic component of claim 1 , wherein the first and second plating layers include at least one of copper (Cu), nickel (Ni), and tin (Sn).

8. A board for mounting a multilayered chip electronic component, the board comprising:

a multilayered chip electronic component comprising:

a ceramic body including internal electrodes and dielectric layers;

external electrodes covering both end surfaces of the ceramic body in a length direction;

first plating layers forming the external electrodes and formed on outer surfaces of the ceramic body;

non-conductive layers formed on outer side surfaces of the first plating layers; and

second plating layers formed on regions of outer surfaces of the first plating layers except for the non-conductive layers;

electrode pads connected to the second plating layers by soldering fillets; and

a printed circuit board having the electrode pads formed thereon,

wherein the soldering fillets are formed to respective one ends of the non-conductive layers adjacent to the printed circuit board.

9. The board of claim 8 , wherein at least one end portion of the non-conductive layers in a thickness direction is extended to a portion of at least one of an upper surface and a lower surface of the ceramic body as well as the outer side surface of the first plating layer.

10. The board of claim 8 , wherein the non-conductive layers includes at least one selected from a group consisting of epoxy, a heat resistant polymer, glass, and a ceramic.

11. The board of claim 8 , wherein the second plating layers are only formed in band portions of the external electrodes.

12. The board of claim 8 , wherein the first and second plating layers include at least one of copper (Cu), nickel (Ni), and tin (Sn).

13. A multilayered chip electronic component comprising:

first plating layers formed on side surfaces and an upper surface of a ceramic body having a hexahedral shape;

non-conductive layers formed on the side surfaces of the ceramic body; and

second plating layers coated on regions of outer surfaces of the first plating layers except for the non-conductive layers,

wherein the second plating layers are only formed in band portions of external electrodes formed on the outer side surfaces, an upper surface, and a lower surface of the ceramic body except for the end surfaces of the ceramic body.

14. The multilayered chip electronic component of claim 13 , wherein at least one end portion of the non-conductive layers in a thickness direction is extended to a portion of at least one of the upper surface and a lower surface of the ceramic body as well as an outer side surface of the first plating layer.

15. The multilayered chip electronic component of claim 13 , wherein at least one end portion of the non-conductive layers in a thickness direction is formed in a position higher or lower than that of at least one of the upper surface and a lower surface of the ceramic body, in the thickness direction.

16. The multilayered chip electronic component of claim 13 , wherein at least one end portion of the non-conductive layers in a thickness direction is formed in a position higher or lower than that of at least one of a lowermost internal electrode and an uppermost internal electrode among the internal electrodes formed in the ceramic body, in the thickness direction.

17. The multilayered chip electronic component of claim 13 , wherein the non-conductive layers include at least one selected from a group consisting of epoxy, a heat resistant polymer, glass, and a ceramic.

18. The multilayered chip electronic component of claim 13 , wherein the first and second plating layers include at least one of nickel (Ni) and tin (Sn).

19. A board for mounting a multilayered chip electronic component, the board comprising:

the multilayered chip electronic component of claim 13 ;

electrode pads connected to the second plating layers by soldering fillets; and

a printed circuit board having the electrode pads formed thereon,

wherein the soldering fillets are formed to respective one ends of the non-conductive layers adjacent to the printed circuit board.

20. The multilayered chip electronic component of claim 1 , wherein the non-conductive layers are formed directly on the outer side surfaces of the first plating layers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2013
From: JEON, BYUNG JUN; LEE, BYOUNG HWA; GU, HYUN HEE; KIM, CHANG HOON; AHN, YOUNG GHYU
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 030485/0246 →
Priority Claims (1)
KR 10-2012-0119642 · Oct 26, 2012 · national
Continuity (1)
Related Publication 20140116766A1 · May 1, 2014