IP Library › Granted Patent US 9,449,811
Granted Patent B2
US 9,449,811 · App. 14/205,878 · Granted Sep 20, 2016

Air-gap scheme for BEOL process

Inventors: Ru-Shang Hsiao (Jhubei, TW); Chih-Fu Chang (Neipu Township, TW); Jen-Pan Wang (Tainan, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L21/02271H01L21/7682H01L21/7685H01L21/76822H01L21/76834H01L21/76877H01L23/5222H01L23/53295H01L23/53238H01L2924/0002
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Quick Facts
Patent No.
US 9,449,811
App. No.
14/205,878
Granted
Sep 20, 2016
Kind
B2
Abstract

The present disclosure relates a method of forming a back-end-of-the-line (BEOL) metallization layer having an air gap disposed between adjacent metal interconnect features, which provides for an inter-level dielectric material with a low dielectric constant, and an associated apparatus. In some embodiments, the method is performed by forming a metal interconnect layer within a sacrificial dielectric layer overlying a substrate. The sacrificial dielectric layer is removed to form a recess extending between first and second features of the metal interconnect layer. A protective liner is formed onto the sidewalls and bottom surface of the recess, and then a re-distributed ILD layer is deposited within the recess in a manner that forms an air gap at a position between the first and second features of the metal interconnect layer. The air gap reduces the dielectric constant between the first and second features of the metal interconnect layer.

Claims (44)

1. A method for forming a back-end-of-the-line (BEOL) metallization layer, comprising:

forming a metal interconnect layer within a sacrificial dielectric layer overlying a substrate;

removing the sacrificial dielectric layer to form a recess extending between first and second features of the metal interconnect layer;

forming a protective liner layer onto sidewalls and a bottom surface of the recess;

depositing a re-distributed inter-level dielectric (ILD) layer within the recess in a manner that forms an air gap at a position between the first and second features of the metal interconnect layer;

wherein the air gap has an upper surface comprising:

a first curve symmetric to a second curve;

a first cusp, located at an intersection of the first curve and the second curve, which is arranged below a top of the metal interconnect layer;

a second cusp located at a non-differentiable point along the first curve; and

wherein the first curve is concave to a plane that intersects the first cusp and the second cusp.

2. The method of claim 1 , wherein the air gap comprises a hammerhead shape having an upper section with a first width and a lower section with a second width that is greater than the first width.

3. The method of claim 1 , wherein the protective liner layer continuously extends between the first feature and the second feature of the metal interconnect layer along a bottom surface and sidewalls of the recess.

4. The method of claim 1 , wherein the protective liner layer comprises silicon.

5. The method of claim 1 , wherein the protective liner layer comprises an oxide layer or a nitride layer.

6. The method of claim 1 , wherein the protective liner layer vertically extends from a position above a bottom surface of the metal interconnect layer to a position that is vertically aligned with a top surface of the metal interconnect layer.

7. The method of claim 1 , wherein the re-distributed ILD layer is deposited within the recess using a chemical vapor deposition process.

8. A method for forming a back-end-of-the-line (BEOL) metallization layer, comprising:

forming a metal interconnect layer within a sacrificial dielectric layer overlying a semiconductor substrate;

removing the sacrificial dielectric layer to form a recess between first and second features of the metal interconnect layer, wherein the recess extends from a top of the metal interconnect layer to an etch stop layer disposed between the first and second features of the metal interconnect layer;

forming a protective liner layer onto sidewalls and a bottom surface of the recess;

depositing a re-distributed inter-level dielectric (ILD) layer onto the protective liner layer to form an air gap at a position between the first and second features of the metal interconnect layer, wherein the air gap comprises a hammerhead shape having an upper section with a first width and a lower section with a second width that is greater than the first width; and

wherein the air gap has an upper surface comprising a first curve that meets a second curve at a peak arranged below the top of the metal interconnect layer, wherein the first curve becomes steeper as a distance from the peak decreases and wherein the second curve becomes steeper as a distance from the peak decreases.

9. The method of claim 8 , further comprising:

performing a chemical mechanical polishing process to remove excess dielectric material of the re-distributed ILD layer that is vertically above the metal interconnect layer.

10. The method of claim 8 , wherein the protective liner layer comprises silicon.

11. The method of claim 8 , wherein the protective liner layer comprises an oxide layer or a nitride layer.

12. The method of claim 8 , wherein the protective liner layer vertically extends from a position above a bottom surface of the metal interconnect layer to a position that is vertically aligned with a top surface of the metal interconnect layer.

13. The method of claim 8 , wherein the re-distributed ILD layer is deposited within the recess using a chemical vapor deposition process.

14. The method of claim 8 , wherein the first curve has a slope that decreases as a distance from the peak increases.

15. A method for forming a back-end-of-the-line (BEOL) metallization layer, comprising:

forming a metal interconnect layer laterally abutting a sacrificial dielectric layer and an etch stop layer underlying the sacrificial dielectric layer;

removing the sacrificial dielectric layer to form a recess vertically extending from an upper surface of the etch stop layer to a top surface of the metal interconnect layer laterally arranged between first and second features of the metal interconnect layer, wherein the etch stop layer has first and second sidewalls that laterally contact the first and second features of the metal interconnect layer;

forming a protective liner layer onto sidewalls and an upper surface of the first and second features and onto an upper surface of the etch stop layer;

depositing a re-distributed inter-level dielectric (ILD) layer onto the protective liner layer to form an air gap at a position between the first and second features of the metal interconnect layer; and

performing a planarization process that removes the re-distributed ILD layer and the protective liner layer outside of the recess.

16. The method of claim 15 , wherein the air gap comprises a hammerhead shape having an upper section with a first width and a lower section with a second width that is greater than the first width.

17. The method of claim 15 , wherein the upper surface of the air gap comprises a first curve and a second curve, which meet at a peak, and wherein the first curve is symmetric to the second curve.

18. The method of claim 17 ,

wherein the air gap has an upper surface comprising:

a first cusp located at an intersection of the first curve and the second curve;

a second cusp located at a non-differentiable point along the first curve; and

wherein the first curve is concave to a plane that intersects the first cusp and the second cusp.

19. The method of claim 15 , wherein the protective liner layer comprises an oxide layer or a nitride layer.

20. The method of claim 15 , wherein the air gap has an upper surface comprising a first curve that meets a second curve at a peak, wherein the first curve becomes steeper as a distance from the peak decreases and wherein the second curve becomes steeper as a distance from the peak decreases.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2014
From: HSIAO, RU-SHANG; CHANG, CHIH-FU; WANG, JEN-PAN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 032572/0912 →
Continuity (1)
Related Publication 20150262929A1 · Sep 17, 2015