IP Library Granted Patent US 9,659,897
Granted Patent B1
US 9,659,897 · App. 15/167,895 · Granted May 23, 2017

Integrated circuit packaging system with interposer structure and method of manufacture thereof

Inventors: Zigmund Ramirez Camacho (Singapore, SG); Emmanuel Espiritu (Singapore, SG); Bartholomew Liao Chung Foh (Singapore, SG); Dao Nguyen Phu Cuong (Singapore, SG); Jeffrey David Punzalan (Singapore, SG)
Assignee: STATS ChipPAC Pte. Ltd.
H01L24/25H01L23/3114H01L23/5226H01L23/562H01L24/17H01L2224/1701H01L2224/2501H01L2224/2505
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Quick Facts
Patent No.
US 9,659,897
App. No.
15/167,895
Granted
May 23, 2017
Kind
B1
Abstract

A system and a method of manufacture thereof of integrated circuit packaging system, including: a pillar; a conductive buildup attached to the pillar; and a molded body encapsulating the conductive buildup, the pillar extending out of the molded body.

Claims (35)

1. An integrated circuit packaging system comprising:

a first trace layer having a pillar extending perpendicularly away from a first trace layer;

a via directly on the first trace layer, the via extending away from the first trace layer on a side opposite from the pillar;

a conductive buildup having the first trace layer and a second trace layer electrically connected by the via; and

a molded body partially encapsulating the first trace layer and the via of the conductive buildup, the first trace layer coplanar with a body first side of the molded body, the pillar extending out of the body first side of the molded body, and the second trace layer over and coplanar with a body second side of the molded body.

2. The system as claimed in claim 1 further comprising a solder mask layer over the conductive buildup, a portion of the conductive buildup exposed from the solder mask layer.

3. The system as claimed in claim 1 wherein the conductive buildup includes:

the second trace layer over the via, the second trace layer directly on the molded body, and the via between the first trace layer and the second trace layer.

4. The system as claimed in claim 1 wherein the pillar includes a diameter of 50 μm to 300 μm.

5. The system as claimed in claim 1 wherein the pillar includes a pillar core in a pillar cavity of the pillar.

6. The system as claimed in claim 1 further comprising a base assembly attached to the pillar, the molded body over the base assembly.

7. The system as claimed in claim 1 further comprising;

a solder structure on a component side of a base assembly; and

wherein the pillar is attached to the solder structure.

8. The system as claimed in claim 1 wherein the pillar includes a height over 400 μm.

9. The system as claimed in claim 1 further comprising:

a base substrate attached to the pillar; and

an integrated circuit device over the base substrate.

10. The system as claimed in claim 1 further comprising

a base assembly attached to the pillar; and

a base encapsulation between the molded body and the base assembly.

11. An integrated circuit packaging system comprising:

a first trace having a wide pillar extending perpendicularly away from a first trace layer, the wide pillar having a diameter of 250 μm to 350 μm;

a via directly on the first trace layer, the via extending away from the first trace layer on a side opposite from the wide pillar;

a conductive buildup having the first trace layer and a second trace layer electrically connected by the via; and

a molded body partially encapsulating the first trace layer and the via of the conductive buildup, the first trace layer coplanar with a body first side of the molded boy, the wide pillar extending out of the body first side, and the second trace layer over and coplanar with a body second side of the molded body.

12. The system as claimed in claim 11 further comprising a pillar core in a pillar cavity of the wide pillar.

13. The system as claimed in claim 11 further comprising:

a base assembly;

a solder structure on a component side of the base assembly; and

wherein the wide pillar is attached to the solder structure.

14. The system as claimed in claim 11 further comprising:

a base substrate attached to the wide pillar;

an integrated circuit device over the base substrate; and

an underfill between the base substrate and the integrated circuit device.

Assignments (2)
CHANGE OF NAME Recorded Nov 9, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 040581/0250 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 8, 2016
From: CAMACHO, ZIGMUND RAMIREZ; ESPIRITU, EMMANUEL; CHUNG FOH, BARTHOLOMEW LIAO; PHU CUONG, DAO NGUYEN; PUNZALAN, JEFFREY DAVID
To: STATS CHIPPAC LTD.
Reel/Frame 040254/0597 →
Continuity (1)
Division 14318061 · Jun 27, 2014