IP Library Granted Patent US 9,689,897
Granted Patent B2
US 9,689,897 · App. 14/565,724 · Granted Jun 27, 2017

Performance enhanced semiconductor socket

Inventor: James Rathburn (Maple Grove, MN)
Assignee: HSIO Technologies, LLC
G01R1/0466Y10T29/49222
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Quick Facts
Patent No.
US 9,689,897
App. No.
14/565,724
Granted
Jun 27, 2017
Kind
B2
Abstract

A test socket for IC devices includes a multi-layered socket housing with at least one center layer and first and second surface layers. The first and second surface layers have a thickness and dielectric constant less than that of the center layers. A plurality of contact members are located in center openings in the center layer with distal ends extending into openings in the first and second layers. The distal ends of the contact members having at least one dimension greater than the openings in the first and second surface layers to retain the contact members in the socket housing. The contact members include center portions with major diameters less than the diameters of the center openings, such that an air gap is maintained between the contact members and the center layer.

Claims (31)

1. A test socket of IC devices comprising:

a multi-layered socket housing including a plurality of dielectric layers comprising:

at least one center layer comprising first and second major surfaces, a center layer thickness, a plurality of center layer openings having center layer opening diameters, and a center layer dielectric constant;

a first surface layer located on the first major surface of the center layer, the first surface layer comprising a first surface layer thickness less than the center layer thickness, a plurality of first surface layer openings aligned with the center layer openings, the first surface layer openings having first surface layer opening diameters less than the center layer opening diameters, the first surface layer comprising a first surface layer dielectric constant less than the center layer dielectric constant;

a second surface layer located on the second major surface of the center layer, the second surface layer comprising a second surface layer thickness less than the center layer thickness, a plurality of second surface layer openings aligned with the center layer openings, the second surface layer openings having second surface layer opening diameters less than the center layer opening diameters, the second surface layer comprising a second surface layer dielectric constant less than the center layer dielectric constant;

a metal layer deposited on inside surfaces of one or more of the center layer openings, the first surface layer opening, and the second surface layer openings; and

a plurality of contact members located in the center openings having distal ends extending into the first and second layer openings to permit electrical coupling with the IC devices, the distal ends of the contact members having at least one dimension greater than the first and second surface layer opening diameters to retain the contact members in the socket housing, the contact members comprising center portions with major diameters less than the center opening diameters, the first and second surface layer openings retaining the contact members in the center openings such that an air gap is maintained between the contact members and the center layer.

2. The test socket for IC devices of claim 1 wherein the metal layer comprises shielding for the contact members.

3. The test socket for IC devices of claim 2 comprising at least one annular ring of metal surrounding the contact members and located between layers of the multi-layered socket housing, the annular ring of metal being electrically coupled to the metal layer surrounding the contact members.

4. The test socket for IC devices of claim 2 wherein the metal layer surrounding the contact members extends through the first and second surface layer.

5. The test socket for IC devices of claim 4 comprising contact pads formed on exposed surfaces of the first and, second surface layers electrically coupled to the metal layer surrounding the contact members.

6. The test socket for IC devices of claim 1 comprising at least one annular ring of metal surrounding the contact members and located between layers of the multi-layered socket housing.

7. The test socket for IC devices of claim 1 wherein the center layer thickness is about two times greater than the first or second surface layer thicknesses.

8. The test socket for IC devices of claim 1 wherein the center layer thickness is about five times greater than the first or second surface layer thicknesses.

9. The test socket for IC devices of claim 1 wherein the center layer openings extend along at least 60% of an overall length of the contact members.

10. The test socket for IC devices of claim 1 wherein the center layer dielectric constant is at least 20% greater than the first or second surface layer dielectric constants.

11. The test socket for IC devices of claim 1 wherein the center layer dielectric constant is at least 30% greater than the first or second surface layer dielectric constants.

12. The test socket for IC devices of claim 1 wherein the center layer opening diameters are at least 125% greater than the major diameters of the contact members.

13. The test socket for IC devices of claim 1 wherein the center layer opening diameters are at least 150% greater than the major diameters of the contact members.

14. The test socket for IC devices of claim 1 wherein the multi layered socket housing includes layers of conductive, non-conductive, or semi-conductive materials.

15. A method of making test socket of IC devices comprising the steps of:

forming a multi-layered socket housing including a plurality of dielectric layers, comprising the steps of;

forming at least one center layer with first and second major surfaces, a center layer thickness, a plurality of center layer openings having center layer opening diameters, and, a center layer dielectric constant;

forming a first surface layer on the first major surface of the center layer, the first surface layer comprising a first surface layer thickness less than the center layer thickness, a plurality of first surface layer openings aligned with the center layer openings, the first surface layer openings having first surface layer opening diameters less than the center layer opening diameters, the first surface layer comprising a first surface layer dielectric constant less than the center layer dielectric constant;

forming a second surface layer on the second major surface of the center layer, the second surface layer comprising a second surface layer thickness less than the center layer thickness, a plurality of second surface layer openings aligned with the center layer openings, the second surface layer openings having second surface layer opening diameters less than the center layer opening diameters, the second surface layer comprising a second surface layer dielectric constant less than the center layer dielectric constant;

depositing a metal layer on inside surfaces of one or more of the center layer openings, the first surface layer opening, and the second surface layer openings; and

positioning a plurality of contact members in the center openings having distal ends extending into the first and second layer openings to permit electrical coupling with the IC devices, the distal ends of the contact members having at least one dimension greater than the first and second surface layer opening diameters to retain the contact members in the socket housing, the contact members comprising center portions with major diameters less than the center opening diameters, the first and, second surface layer openings retaining the contact members in the center openings such that an air gap is maintained between the contact members and the center layer.

16. The method of claim 15 wherein the first surface layer, the second surface layer and the center layer are discrete structures assembled to form the multi-layered socket housing.

17. The method of claim 15 comprising depositing a metal layer on inside surfaces of the center layer openings to surround portions of the contact members.

18. The method of claim 17 comprising forming contact pads on exposed surfaces of the first and second surface layers electrically coupled to the metal layer surrounding the contact members.

19. The method of claim 15 comprising forming at least one annular ring of metal surrounding the contact members between layers of the multi-layered socket housing.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2023
From: HSIO TECHNOLOGIES, LLC
To: LCP MEDICAL TECHNOLOGIES, LLC
Reel/Frame 065391/0193 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2014
From: RATHBURN, JAMES
To: HSIO TECHNOLOGIES, LLC
Reel/Frame 034506/0855 →
Continuity (10)
Continuation In Part 13700639
Continuation In Part 14565724
Continuation In Part 13410914 · Mar 2, 2012
Continuation In Part 14565724
Continuation In Part 13412870 · Mar 6, 2012
Provisional Application 61914179 · Dec 10, 2013
Provisional Application 61351114 · Jun 3, 2010
Provisional Application 61448288 · Mar 2, 2011
Provisional Application 61449889 · Mar 7, 2011
Related Publication 20150091600A1 · Apr 2, 2015