Phase change memory element
A phase-change memory element with an electrically isolated conductor is provided. The phase-change memory element includes: a first electrode and a second electrode; a phase-change material layer electrically connected to the first electrode and the second electrode; and at least two electrically isolated conductors, disposed between the first electrode and the second electrode, directly contacting the phase-change material layers.
1. A phase-change memory, comprising:
an electrode;
first electrically-isolated conductors located on opposite sides of the electrode;
an adjacent electrode;
second electrically-isolated conductors located on opposite sides of the adjacent electrode; and
a phase-change material that contacts the electrode, the adjacent electrode, and the first and second electrically-isolated conductors.
2. The phase-change memory of claim 1 , wherein the first electrically-isolated conductors do not directly contact the electrode and the second electrically-isolated conductors do not directly contact the adjacent electrode.
3. The phase-change memory of claim 1 , wherein a memory cell corresponding to one of the electrically-isolated conductors includes a multi-level memory cell.
4. The phase-change memory of claim 1 , wherein the electrode and the adjacent electrode are coplanar.
5. The phase-change memory of claim 1 , further comprising:
a substrate below the electrode; and
a transistor formed on the substrate, wherein a source or a drain of the transistor is electrically connected to the electrode.
6. The phase-change memory of claim 5 , wherein at least a portion of the transistor is located below a top surface of the substrate.
7. The phase-change memory of claim 6 , wherein the source or the drain is electrically connected to the electrode via a metal plug formed in a hole on the top surface of the substrate.
8. A phase-change memory, comprising:
an electrode;
electrically-isolated conductors located on opposite sides of the electrode;
a phase-change material that contacts the electrode and the electrically-isolated conductors; and
an adjacent electrode;
wherein the electrically-isolated conductors are located on opposite sides of the adjacent electrode.
9. The phase-change memory of claim 8 , further comprising:
a substrate below the electrode; and
a diode formed on the substrate, wherein a terminal of the diode is electrically connected to the electrode.
10. The phase-change memory of claim 8 , further comprising:
a substrate below the electrode; and
a complementary metal oxide semiconductor (CMOS) circuit formed on the substrate, wherein a terminal of the CMOS circuit is electrically connected to the electrode.
11. The phase-change memory of claim 8 , wherein the electrode is electrically connected to a bit line via a metal plug.
12. A phase-change memory, comprising:
an electrode;
electrically-isolated conductors located on opposite sides of the electrode; and
a phase-change material that contacts the electrode and the electrically-isolated conductors;
wherein a memory cell corresponding to one of the electrically-isolated conductors includes a multi-level memory cell.
13. The phase-change memory of claim 12 , wherein the phase change material comprises In, Ge, Sb, Te, Ga, Sn, or combinations thereof.
14. The phase-change memory of claim 12 , wherein the electrode comprises Al, W, Mo, Ti, TiN, TiAIN, TiW, or TaN.
15. The phase-change memory of claim 12 , wherein the electrically-isolated conductors comprise Al, W, Mo, Ti, TiN, TiAIN, TiW, or TaN.
16. The phase-change memory of claim 12 , wherein the electrode is electrically connected to an electrical element via a first metal plug.
17. The phase-change memory of claim 12 , wherein the electrically-isolated conductors form a sidewall portion of a pillar structure.
18. A phase-change memory, comprising:
an electrode;
electrically-isolated conductors located on opposite sides of the electrode; and
a phase-change material that contacts the electrode and the electrically-isolated conductors;
wherein a portion of the phase-change material is in physical contact with at least one of a top surface of the electrode or a sidewall of a dielectric layer that is in physical contact with the top surface of the electrode; and
wherein a memory cell corresponding to one of the electrically-isolated conductors includes a multi-level memory cell.
19. The phase-change memory of claim 18 , further comprising:
an adjacent electrode;
wherein the electrode and the adjacent electrode are coplanar.
20. A phase-change memory, comprising:
an electrode;
a phase-change material that contacts the electrode;
a first conductor in contact with the phase-change material; and
a second conductor in contact with the phase-change material and electrically connected to the first conductor only through the phase-change material;
wherein each of the first and second conductors is electrically connected to the electrode only through the phase-change material.
21. The phase-change memory of claim 20 , wherein a memory cell corresponding to one of the conductors includes a multi-level memory cell.
22. The phase-change memory of claim 20 , wherein the phase change material comprises In, Ge, Sb, Te, Ga, Sn, or combinations thereof.
23. The phase-change material of claim 20 , wherein the first conductor is formed above a substrate and the second conductor is formed above the first conductor.