Group III-V device structure having a selectively reduced impurity concentration

1. A semiconductor structure, comprising:

a substrate;

a transition body over said substrate;

a group III-V intermediate body having a bottom surface over said transition body;

a group III-V device layer over a top surface of said group III-V intermediate body;

wherein said group III-V intermediate body has an impurity concentration that is substantially constant from said bottom surface to a first intermediate depth between said bottom surface and said top surface, reduces at a substantially constant rate as a function of position from said first intermediate depth to a second intermediate depth between said first intermediate depth and said top surface, and is substantially constant from said second intermediate depth to said top surface.

2. The semiconductor structure of claim 1 , wherein an impurity producing said impurity concentration is a P type impurity.

3. The semiconductor structure of claim 1 , wherein said impurity concentration comprises a carbon concentration.

4. The semiconductor structure of claim 1 , wherein said impurity concentration includes a plurality of impurity species.

5. The semiconductor structure of claim 1 , wherein said group III-V intermediate body comprises a compositionally graded III-Nitride body having a first III-Nitride composition at said bottom surface and a second III-Nitride composition above said bottom surface.

6. The semiconductor structure of claim 1 , wherein said transition body includes a group III-V transition structure having a selectively modified impurity concentration such that a bottom surface impurity concentration of said group III-V transition structure is selectively modified to a top surface impurity concentration of said group III-V transition structure.

7. The semiconductor structure of claim 6 , wherein said selectively modified impurity concentration is modified in a step-wise fashion from said bottom surface impurity concentration to said top surface impurity concentration.

8. The semiconductor structure of claim 6 , wherein said selectively modified impurity concentration rises and falls between said bottom surface impurity concentration and said top surface impurity concentration.

9. A method, comprising:

fabricating a transition body over a substrate;

fabricating a group III-V intermediate body having a bottom surface over said transition body;

fabricating a group III-V device layer over a top surface of said group III-V intermediate body;

wherein fabricating said group III-V intermediate body comprises reducing an impurity concentration of said group III-V intermediate body such that said impurity concentration is substantially constant from said bottom surface to a first intermediate depth between said bottom surface and said top surface, reduces at a substantially constant rate as a function of position from said first intermediate depth to a second intermediate depth between said first intermediate depth and said top surface, and is substantially constant from said second intermediate depth to said top surface.

10. The method of claim 9 , wherein fabricating said group III-V intermediate body comprises selectively reducing a growth rate of said group HI-V intermediate body from a higher growth rate at said bottom surface to a lower growth rate at said top surface.

11. The method of claim 9 , wherein fabricating said group III-V intermediate body comprises selectively increasing a growth temperature of said group III-V intermediate body from a lower growth temperature at said bottom surface to a higher growth temperature at said top surface.

12. The method of claim 9 , wherein an impurity producing said impurity concentration is a P type impurity.

13. The method of claim 9 , wherein said impurity concentration comprises a carbon concentration.

14. The method of claim 9 , wherein said impurity concentration includes a plurality of impurity species.

15. The method of claim 9 , wherein said group III-V intermediate body comprises a compositionally graded III-Nitride body having a first III-Nitride composition at said bottom surface and a second III-Nitride composition above said bottom surface.

16. The method of claim 9 , wherein fabricating said transition body includes fabricating a group III-V transition structure having a selectively modified impurity concentration such that a bottom surface impurity concentration of said group IH-V transition structure is selectively modified to a top surface impurity concentration of said group III-V transition structure.

17. The method of claim 16 , wherein said selectively modified impurity concentration is reduced in a step-wise fashion from said bottom surface impurity concentration to said top surface impurity concentration.

18. The method of claim 16 , wherein said selectively modified impurity concentration rises and falls between said bottom surface impurity concentration and said top surface impurity concentration.

19. A semiconductor structure, comprising:

a substrate;

a transition body over said substrate;

a group III-V intermediate body having a bottom surface over said transition body;

a group III-V device layer over a top surface of said group III-V intermediate body;

wherein said group III-V intermediate body comprises an impurity concentration having at least two step-wise reductions in a direction from said bottom surface to said top surface.

20. The semiconductor structure of claim 19 , wherein said impurity concentration has at least four step-wise reductions in said direction from said bottom surface to said top surface.