Single die output power stage using trench-gate low-side and LDMOS high-side MOSFETs, structure and method

1. A semiconductor device comprising:

a single semiconductor die;

a high-side lateral diffusion metal oxide semiconductor (LDMOS) device formed on the single semiconductor die, the high-side LDMOS device having a high-side body region;

a low-side trench-gate vertical diffusion metal oxide semiconductor (VDMOS) device formed on the single semiconductor die, the VDMOS device having a low-side body region; and

a single conductive structure on the semiconductor die which forms a portion of a gate of the high-side transistor and a portion of a gate of the low-side transistor;

wherein the high-side body region and the low-side body region are formed from an unmasked blanket body implant in a layer of the high-side LDMOS device and a layer of the low-side VDMOS device.

2. The semiconductor device of claim 1 , wherein the single conductive structure is a first single conductive structure and the semiconductor device further comprises:

a conductive layer etched to form a contact to the semiconductor wafer section, a shield for the portion of the gate of the high-side transistor, a contact to a floating guard ring to the trench-gate VD MOS transistor, and a contact to a source of the trench-gate VDMOS transistor from a second single conductive structure.

3. The semiconductor device of claim 2 , further comprising a second conductive layer etched to form a drain contact to a drain of the high-side LDMOS transistor, a source contact to a source of the trench-gate low-side VD MOS transistor, a gate contact to the gate of the trench-gate low-side VD MOS device, and a gate contact to the gate of the high-side transistor from a third single conductive structure.

4. The semiconductor device of claim 1 , further comprising a conductive trench-source-contact structure which electrically shorts a gate shield for the high-side LDMOS transistor gate to the substrate, which contacts the semiconductor substrate, and which contacts a body contact on all sides of a portion of the trench-source-contact structure.

5. The semiconductor device of claim 1 wherein the single conductive structure is a first single conductive structure and the semiconductor device further comprising a second single conductive structure which forms:

a contact to a source region of the high-side transistor;

a contact to a body region of the high-side transistor;

a contact to a source region of the low-side transistor;

a contact to a body region of the low-side transistor;

a gate shield for a transistor gate of the high-side transistor;

an electrical connection between the source and body of the high-side device; and

an electrical connection between a drain of the low-side device and a semiconductor substrate of the semiconductor die.

6. The semiconductor device of claim 1 , wherein the semiconductor die is a first semiconductor die and the semiconductor device further comprises:

a second semiconductor die different from the first semiconductor die comprising voltage converter controller circuitry; the voltage converter controller circuitry electrically coupled with the first semiconductor die.

7. The semiconductor device of claim 1 , wherein the single conductive structure is a first single conductive structure and the semiconductor device further comprises:

a conductive trench contact having at least a portion within a trench in a semiconductor substrate;

at least one conductive gate portion of the LDMOS device; and

a gate shield interposed between the at least one conductive gate portion of the LDMOS device and a structure which overlies the gate shield, wherein the gate shield and the conductive trench contact are formed from a second single conductive structure.

8. The semiconductor device of claim 7 further comprising a conductive layer etched to define:

a conductive drain interconnect electrically coupled to a drain of the LDMOS device; and

a conductive source interconnect electrically coupled to a source of the VDMOS device, wherein the conductive drain interconnect and the conductive source interconnect are formed from a third single conductive structure.

9. The semiconductor device of claim 8 , wherein:

a portion of the third single conductive structure which forms the conductive drain interconnect is electrically coupled to voltage in (VIN); and

a portion of the third single conductive structure which forms the conductive source interconnect is electrically coupled to ground.

10. A semiconductor device comprising:

a single semiconductor die;

a blanket drift region implant in a high-side region and a low-side region of the semiconductor device, the drift region configured to forming a drain region of a high-side lateral diffusion metal oxide semiconductor (LDMOS) device on the semiconductor die;

a deep body implant region in the high-side region;

a field oxide over the high-side region and an area between the high-side region and the low-side region;

a trench-gate region of a low-side transistor trench-gate vertical diffusion metal oxide semiconductor (VDMOS) device on said semiconductor die in the low-side region;

a gate layer patterned to form both a portion of a gate of the high-side LDMOS and a portion of a gate of the low-side VDMOS; and

a blanket body implant in the high-side region and the low-side region configured to form body implant regions in the high-side region and the low-side region;

wherein the gate of the high-side LDMOS, the gate of the low-side VDMOS and the field oxide provide a mask for the blanket body implant in the high-side LDMOS drain and a low-side VDMOS termination.