Microelectromechanical system (MEMS) bond release structure and method of wafer transfer for three-dimensional integrated circuit (3D IC) integration
A microelectromechanical system (MEMS) bond release structure is provided for manufacturing of three-dimensional integrated circuit (3D IC) devices with two or more tiers. The MEMS bond release structure includes a MEMS sacrificial release layer which may have a pillar or post structure, or alternatively, a continuous sacrificial layer for bonding and release.
1. A microelectromechanical system (MEMS) bond release structure, comprising:
a carrier wafer;
a MEMS sacrificial release layer on the carrier wafer;
a semiconductor oxide layer on the MEMS sacrificial release layer; and
an active semiconductor layer on the semiconductor oxide layer,
wherein the semiconductor oxide layer is in direct contact with a surface of an oxide layer and the MEMS sacrificial release layer is in direct contact with an opposite surface of the oxide layer,
wherein the active semiconductor layer is doped,
wherein there are no devices within the active semiconductor layer,
wherein a surface of the active semiconductor layer is in direct contact with the semiconductor oxide layer, and
wherein a doped portion of the active semiconductor layer is doped, the doped portion being a portion of the active semiconductor layer near the surface that is in direct contact with the semiconductor oxide layer.
2. The MEMS bond release structure of claim 1 , wherein the semiconductor oxide layer comprises a silicon dioxide (SiO 2 ) layer.
3. The MEMS bond release structure of claim 2 , wherein the active semiconductor layer comprises an active silicon layer on the SiO 2 layer.
4. The MEMS bond release structure of claim 1 , comprising a plurality of MEMS posts spaced apart from one another, each of the plurality of MEMS posts comprising the MEMS sacrificial release layer.
5. The MEMS bond release structure of claim 4 , wherein the MEMS sacrificial release layer comprises a material selected from the group consisting of molybdenum (Mo), germanium (Ge), germanium oxide (GeO x ) and silicon oxide (SiO x ).
6. The MEMS bond release structure of claim 4 , wherein each of the plurality of MEMS posts further comprises the oxide layer on the MEMS sacrificial release layer for bonding the MEMS sacrificial release layer with the semiconductor oxide layer.
7. The MEMS bond release structure of claim 4 , wherein the plurality of MEMS posts comprise one or more inner MEMS posts and one or more outer MEMS posts at least partially surrounding the one or more inner MEMS posts on the carrier wafer.
8. The MEMS bond release structure of claim 4 , wherein the semiconductor oxide layer is continuous over the plurality of MEMS posts.
9. The MEMS bond release structure of claim 1 , wherein the semiconductor oxide layer and the active semiconductor layer together form a buried oxide (BOX) layer.
10. The MEMS bond release structure of claim 1 , wherein the doped portion is H+ delta doped.
11. A microelectromechanical system (MEMS) bond release structure, comprising:
a carrier substrate comprising a carrier wafer, and a release composition on the carrier wafer; and
a silicon-on-insulator (SOI) substrate on the carrier substrate, the SOI substrate comprising a semiconductor oxide layer and an active semiconductor layer on the semiconductor oxide layer,
wherein the semiconductor oxide layer of the SOI substrate is in direct contact with the release composition of the carrier substrate,
wherein the release composition does not comprise any active layer,
wherein the release composition of the carrier substrate comprises:
a sacrificial layer on the carrier wafer; and
an oxide layer on the sacrificial layer such that the semiconductor oxide layer of the SOI substrate is in direct contact with the oxide layer,
wherein the active semiconductor layer is doped,
wherein there are no devices within the SOI substrate,
wherein a surface of the active semiconductor layer is in direct contact with the semiconductor oxide layer, and
wherein a doped portion of the active semiconductor layer is doped, the doped portion being a portion of the active semiconductor layer near the surface that is in direct contact with the semiconductor oxide layer.
12. The MEMS bond release structure of claim 11 , wherein the sacrificial layer comprises a material selected from the group consisting of molybdenum (Mo), germanium (Ge), germanium oxide (GeO x ) and silicon oxide (SiO x ).
13. The MEMS bond release structure of claim 11 , wherein the release composition of the carrier substrate comprises a plurality of MEMS posts spaced apart from one another on the carrier wafer such that the semiconductor oxide layer of the SOI substrate is in direct contact with the plurality of MEMS posts.
14. The MEMS bond release structure of claim 13 , wherein each of the plurality of MEMS posts comprises the sacrificial layer on the carrier wafer.
15. The MEMS bond release structure of claim 14 , wherein the sacrificial layer comprises a material selected from the group consisting of molybdenum (Mo), germanium (Ge), germanium oxide (GeO x ) and silicon oxide (SiO x ).
16. The MEMS bond release structure of claim 14 , wherein each of the plurality of MEMS posts further comprises the oxide layer on the sacrificial layer.
17. The MEMS bond release structure of claim 13 , wherein the plurality of MEMS posts comprise:
one or more inner MEMS posts; and
one or more outer MEMS posts at least partially surrounding the one or more inner MEMS posts.
18. The MEMS bond release structure of claim 13 , wherein the semiconductor oxide layer is continuous over the plurality of MEMS posts.
19. The MEMS bond release structure of claim 11 , wherein the doped portion is H+ delta doped.