IP Library › Granted Patent US 9,941,360
Granted Patent B2
US 9,941,360 · App. 15/340,199 · Granted Apr 10, 2018

Field effect transistor and semiconductor device including the same

Inventors: Shigenobu Maeda (Seongnam-si, KR); Seunghan Seo (Seoul, KR); Yeohyun Sung (Bucheon-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H01L29/1606H01L29/04H01L29/0847H01L29/1037H01L29/1054H01L29/165H01L29/2003H01L29/22H01L29/24H01L29/267H01L29/778H01L29/78H01L29/786H01L29/517
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Quick Facts
Patent No.
US 9,941,360
App. No.
15/340,199
Granted
Apr 10, 2018
Kind
B2
Abstract

A field effect transistor and a semiconductor device including the same are provided. The semiconductor device may include a channel layer, which is provided on a substrate and includes a two-dimensional atomic layer made of a first material, and a source/drain layer, which is provided on the substrate and includes a second material. The first material may be one of phosphorus allotropes, the second material may be one of carbon allotropes, and the channel layer and the source/drain layer may be connected to each other by covalent bonds between the first and second materials.

Claims (25)

1. A semiconductor device comprising:

a channel layer provided on a substrate, the channel layer including a two-dimensional atomic layer made of a first material; and

a source/drain layer provided on the substrate, the source/drain layer including a second material,

wherein the first material is one of phosphorus allotropes,

the second material is one of carbon allotropes, and

the channel layer and the source/drain layer are connected to each other by covalent bonds between the first material and the second materials.

2. The device of claim 1 , wherein the first material is phosphorene.

3. The device of claim 2 , wherein the phosphorene has an armchair structure, a diagonal structure, a zigzag structure, or any combination thereof, and

the channel layer and the source/drain layer constitute a field effect transistor, whose threshold voltage is dependent on a structure of the phosphorene.

4. The device of claim 1 , wherein the first material comprises a single atomic layer or a plurality of vertically-stacked atomic layers, and

the channel layer and the source/drain layer constitute a field effect transistor, whose threshold voltage is dependent on a number of the single atomic layer or the plurality of vertically-stacked atomic layers of the first material.

5. The device of claim 1 , wherein the second material is at least one of graphene and carbon nanotube.

6. The device of claim 1 , wherein the second material comprises graphene and carbon nanotube that is provided on and connected to the graphene by covalent bonds, and

the carbon nanotube has a longitudinal axis perpendicular a top surface of the graphene.

7. The device of claim 1 , further comprising a gate electrode provided on the substrate to cross the channel layer.

8. The device of claim 1 , wherein the channel layer and the source/drain layer constitute an active layer, and a plurality of active layers are provided, and

the plurality of active layers are provided on the substrate to be arranged in a direction parallel to a top surface of the substrate.

9. The device of claim 8 , further comprising a gate electrode extending in the direction and commonly crossing channel layers of the plurality of active layers.

10. The device of claim 1 , further comprising a plurality of interlayered insulating layers that are sequentially stacked,

the channel layer and the source/drain layer constitute an active layer and a plurality of active layers are provided, and

the plurality of active layers are interposed between the plurality of interlayered insulating layers.

11. A field effect transistor comprising:

a channel comprising a first two-dimensional atomic layer made of phosphorene; and

a source/drain comprising a second two-dimensional atomic layer made of graphene,

wherein the channel and the source/drain are connected to each other by covalent bonds between the phosphorene and the graphene.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2016
From: MAEDA, SHIGENOBU; SEO, SEUNGHAN; SUNG, YEOHYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 040185/0870 →
Priority Claims (1)
KR 10-2015-0170784 · Dec 2, 2015 · national
Continuity (1)
Related Publication 20170162654A1 · Jun 8, 2017