IP Library Granted Patent US 9,984,879
Granted Patent B2
US 9,984,879 · App. 15/497,544 · Granted May 29, 2018

Silicon carbide semiconductor device and method for manufacturing same

Inventors: Kosuke Uchida (Osaka, JP); Takeyoshi Masuda (Osaka, JP); Yu Saitoh (Osaka, JP)
Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
H01L21/049H01L29/1608H01L29/4236H01L29/42368H01L29/513H01L29/66068H01L29/7827
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Quick Facts
Patent No.
US 9,984,879
App. No.
15/497,544
Granted
May 29, 2018
Kind
B2
Abstract

A trench has first to third side surfaces respectively constituted of first to third semiconductor layers. A first side wall portion included in a first insulating film has first to third regions respectively located on the first to third side surfaces. A second insulating film has a second side wall portion located on the first side wall portion. The second side wall portion has one end and the other end, the one end being connected to the second bottom portion of the second insulating film, the other end being located on one of the first and second regions, the other end being separated from the third region.

Claims (10)

1. A method for manufacturing a silicon carbide semiconductor device comprising steps of:

preparing a silicon carbide substrate including a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer, said first semiconductor layer having a first conductivity type, said second semiconductor layer being provided on said first semiconductor layer, said second semiconductor layer having a second conductivity type, said third semiconductor layer being provided on said second semiconductor layer, said third semiconductor layer being separated from said first semiconductor layer by said second semiconductor layer, said third semiconductor layer having said first conductivity type;

forming a trench in said silicon carbide substrate, said trench including a bottom surface and a side wall surface, said bottom surface being constituted of said first semiconductor layer, said side wall surface having first to third side surfaces respectively constituted of said first to third semiconductor layers;

forming a first insulating film to directly cover each of said side wall surface and said bottom surface, said first insulating film having a first bottom portion and a first side wall portion, said first bottom portion being located on said bottom surface, said first side wall portion being located on said side wall surface, said first side wall portion having first to third regions respectively located on said first to third side surfaces;

forming a silicon film on said first insulating film, said silicon film having a second bottom portion and a second side wall portion, said second bottom portion being located on said first bottom portion, said second side wall portion being located on said first side wall portion, said second side wall portion having one end and an other end, said one end being connected to said second bottom portion, the other end being located on one of said first and second regions, the other end being separated from said third region;

forming a second insulating film by oxidizing said silicon film, said first and second insulating films constituting a gate insulating film; and

forming a gate electrode on said trench with said gate insulating film being interposed therebetween.

2. The method for manufacturing the silicon carbide semiconductor device according to claim 1 , wherein the step of forming said second insulating film by oxidizing said silicon film is performed at not less than 800° C. and not more than 1150° C.

3. The method for manufacturing the silicon carbide semiconductor device according to claim 1 , wherein the step of forming said second insulating film includes a step of heating said second side wall portion to reduce an angle of the other end of said second side wall portion relative to said first side wall portion.

4. The method for manufacturing the silicon carbide semiconductor device according to claim 3 , wherein the step of heating said second side wall portion is performed at not less than 1300° C. and not more than 1400° C.

Assignments (2)
NUNC PRO TUNC ASSIGNMENT Recorded Jul 1, 2026
From: SUMITOMO ELECTRIC INDUSTRIES, LTD.
To: MITSUMI ELECTRIC CO., LTD.
Reel/Frame 075871/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2017
From: UCHIDA, KOSUKE; MASUDA, TAKEYOSHI; SAITOH, YU
To: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Reel/Frame 042149/0146 →
Priority Claims (1)
JP 2013-056480 · Mar 19, 2013 · national
Continuity (2)
Division 14768713
Related Publication 20170229305A1 · Aug 10, 2017