IP Library Granted Patent US 6,646,509
Granted Patent Utility
US 6,646,509 · Confirmation No. 4045

LAYOUT TECHNIQUE FOR MATCHED RESISTORS ON AN INTEGRATED CIRCUIT SUBSTRATE

Inventor: David A. Sobel
⬇ PDF
Code Description Pages PDF
2015-02-27 EBCC.AD Notice of Change of Address Place in File Wrapper Due to Electronic Business Center(EBC) Customer Number Update 1 View
2003-07-31 IFEE Issue Fee Payment (PTO-85B) 1 View
2003-07-31 LET. Miscellaneous Incoming Letter 3 View
2002-07-31 TRNA Transmittal of New Application 5 View
2002-07-31 ADS Application Data Sheet 1 View
2002-07-31 SPEC Specification 16 View
2002-07-31 CLM Claims 2 View
2002-07-31 ABST Abstract 1 View
2002-07-31 DRW Drawings-only black and white line drawings 9 View
2002-07-31 OATH Oath or Declaration filed 2 View
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this application's details
Quick Facts
Patent No.
US 6,646,509
App. No.
10/208,043
Filed
2002-07-31
Granted
2003-11-11
Pub. No.
US20030140320A1
Art Unit
2812
PTA
0 days