IP Library Granted Patent US 7,078,803
Granted Patent B2
US 7,078,803 · App. 10/292,073 · Granted Jul 18, 2006

Integrated circuit heat dissipation system

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Quick Facts
Patent No.
US 7,078,803
App. No.
10/292,073
Granted
Jul 18, 2006
Kind
B2
Abstract

An integrated circuit heat dissipation system for reducing the number of junctions in packaged integrated circuits thereby decreasing thermal impedance and increasing thermal dissipation efficiency. The integrated circuit heat dissipation system includes a lid attached to a substrate, a cap attached about the lid creating a heat dissipation chamber, and a semiconductor chip attached to the lid by a thermally conductive adhesive. The lid may or may not form a cavity about the semiconductor chip depending upon the substrate utilized. The lid preferably includes a plurality of fins extending from thereof defining a plurality of channels or a plurality of grooves thereby increasing the heat flux of the lid.

Claims (13)

1. An integrated circuit device, comprising:

a substrate;

a lid coupled to said substrate;

a semiconductor chip attached to a first surface of said lid; and

a cap attached to a second surface of said lid;

wherein said cap is configured for spray cooling, at least one fence attached within the interior of said cap.

2. The integrated circuit device of claim 1 , wherein said cap is attached to said lid through an adhesive around a perimeter of said cap.

3. The integrated circuit of claim 1 , wherein said lid forms a cavity with respect to said substrate, wherein said semiconductor chip is positioned within said cavity.

4. The integrated circuit of claim 1 , wherein a plurality of fins protrude from said second surface of said lid.

5. The integrated circuit of claim 1 , wherein a plurality of grooves extend into said second surface of said lid.

6. The integrated circuit of claim 5 , including openings within said plurality of grooves of said lid.

7. The integrated circuit of claim 1 , wherein said semiconductor chip is attached to a surface of said substrate.

8. The integrated circuit of claim 1 , wherein said lid is thermally conductive.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2010
From: ISOTHERMAL SYSTEMS RESEARCH, INC.
To: PARKER INTANGIBLES LLC
Reel/Frame 024294/0473 →
RELEASE Recorded Mar 5, 2010
From: SILICON VALLEY BANK
To: ISOTHERMAL SYSTEMS RESEARCH INC.
Reel/Frame 024035/0511 →
SECURITY AGREEMENT Recorded Aug 24, 2007
From: ISOTHERMAL SYSTEMS RESEARCH, INC.
To: SILICON VALLEY BANK
Reel/Frame 019733/0853 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2003
From: TILTON, CHARLES L.; TILTON, DONALD E.; WEILER, JEFFREY K.
To: ISOTHERMAL SYSTEMS RESEARCH, INC.
Reel/Frame 013649/0251 →