Granted Patent B1

US 7,450,416 · App. 11/021,944 · Granted Nov 11, 2008

Abstract

Claims (59)

1. A method of undertaking a procedure on a memory-diode comprising:

providing a conductive memory-diode which is capable of having each of a plurality of different states dependent on different respective threshold voltages; and

providing that a read process of the conductive memory-diode is indicative of the state of the memory-diode.

2. The method of claim 1 wherein the read process provides a level of voltage across the memory-diode which is dependent upon the threshold voltage of the memory-diode.

3. The method of claim 2 wherein the read process of the memory-diode is undertaken by applying a current through the memory-diode in the forward direction of the memory-diode.

4. The method of claim 3 wherein for the read process, the magnitude of current applied through the memory-diode in the forward direction of the memory-diode, for any of the plurality of different threshold voltages, is substantially the same.

5. The method of claim 4 wherein a threshold voltage of the plurality of different threshold voltages of the memory-diode is determined by applying an electrical potential across the memory-diode from higher to lower potential in the reverse direction of the memory-diode.

6. The method of claim 1 wherein a threshold voltage of the plurality of different threshold voltages of the memory-diode is determined by applying an electrical potential across the memory-diode from higher to lower potential in the reverse direction of the memory-diode.

7. The method of claim 1 wherein the read process provides a level of current through the memory-diode which is dependent upon the determined threshold voltage of the memory-diode.

8. The method of claim 7 wherein the read process of the memory-diode is undertaken by applying an electrical potential across the memory-diode from higher to lower potential in the forward direction of the memory-diode.

9. The method of claim 8 wherein for the read process, the magnitude of electrical potential applied across the memory-diode from higher to lower potential in the forward direction of the memory-diode, for any of the plurality of different threshold voltages, is substantially the same.

10. The method of claim 9 wherein a threshold voltage of the plurality of different threshold voltages of the memory-diode is determined by applying an electrical potential across the memory-diode from higher to lower potential in the reverse direction of the memory-diode.

11. The method of claim 7 wherein a threshold voltage of the plurality of different threshold voltages of the memory-diode is determined by applying an electrical potential across the memory-diode from higher to lower potential in the reverse direction of the memory-diode.

12. The method of claim 7 wherein, for a threshold voltage of the plurality thereof, the read process of the state of the memory-diode provides a current level therethrough which is substantially zero.

13. The method of claim 7 wherein, for a threshold voltage of the plurality thereof, the read process of the state of the memory-diode provides a current level therethrough which is other than substantially zero.

14. The method of claim 1 wherein the read process is capable of providing first and second levels of voltage applied to the memory-diode in the forward direction of the memory-diode.

15. The method of claim 14 wherein the first voltage is of a lower level than a selected threshold voltage of the memory-diode, and wherein the second voltage is of a higher level then the selected threshold voltage of the memory-diode.

16. The method of claim 15 wherein the read process is capable of providing a third level of voltage applied to the memory-diode in the forward direction of the memory-diode.

17. A method of undertaking a procedure on a conductive memory-diode comprising:

providing a first threshold voltage for the memory-diode;

applying a read current of a selected magnitude through the memory-diode in the forward direction of the memory-diode;

providing a second threshold voltage for the memory-diode, different from the first threshold voltage; and

applying a read current of said selected magnitude through the memory-diode in the forward direction of the memory-diode.

18. The method of claim 17 wherein at least one of the first and second threshold voltages for the memory-diode is determined by applying an electrical potential across the memory-diode from higher to lower potential in the reverse direction of the memory-diode.

19. The method of claim 17 wherein the first and second threshold voltages for the memory-diode are determined by applying different respective electrical potentials across the memory-diode from higher to lower potential in the reverse direction of the memory-diode.

20. A method of undertaking a procedure on a conductive memory-diode comprising:

providing a first threshold voltage for the memory-diode;

applying an electrical potential of a selected magnitude across the memory-diode from higher to lower potential in the forward direction of the memory-diode;

providing a second threshold voltage for the memory-diode, different from the first threshold voltage; and

applying the electrical potential of said selected magnitude across the memory-diode from higher to lower potential in the forward direction of the memory-diode.

21. The method of claim 20 wherein the steps of applying an electrical potential of a selected magnitude across the memory-diode from higher to lower potential in the forward direction of the memory-diode are read processes.

22. The method of claim 20 wherein at least one of the first and second threshold voltages for the memory-diode is determined by applying an electrical potential across the memory-diode from higher to lower potential in the reverse direction of the memory-diode.

23. The method of claim 20 wherein the first and second threshold voltages for the memory-diode are determined by applying different respective electrical potentials across the memory-diode from higher to lower potential in the reverse direction of the memory-diode.

24. A method of undertaking a procedure on first and second memory-diodes comprising:

selecting a forward direction threshold voltage of the first memory-diode; and

selecting a forward direction threshold voltage of the second memory-diode, the selected threshold voltage of the first memory-diode being different from the selected threshold voltage of the second memory-diode, and further comprising reading the state of each of the first and second memory-diodes, wherein reading the state of each of the first and second memory-diodes comprises applying a read electrical potential of substantially the same magnitude across each memory-diode from higher to lower potential in the forward direction thereof.

25. The method of claim 24 wherein the step of selecting the threshold voltage of the first memory-diode comprises applying an electrical potential to the first memory-diode from higher to lower potential in the reverse direction of the memory-diode, and wherein the step of selecting the threshold value of the second memory-diode comprises applying an electrical potential to the second memory-diode from higher to lower potential in the reverse direction of the memory-diode, the electrical potential applied to the first memory-diode being different from the electrical potential applied to the second memory-diode.

26. A method of undertaking a procedure on first and second memory-diodes comprising:

selecting a forward direction threshold voltage of the first memory-diode; and

selecting a forward direction threshold voltage of the second memory-diode, the selected threshold voltage of the first memory-diode being different from the selected threshold voltage of the second memory-diode, and further comprising reading the state of each of the first and second memory-diodes, wherein reading the state of each of the first and second memory-diodes comprises applying a first electrical potential of a first level across each memory-diode from higher to lower potential in the forward direction thereof, and applying a second electrical potential of a second level greater than the first level across at least one of the memory-diodes from higher to lower potential in the forward direction thereof.

27. The method of claim 26 wherein the step of selecting the threshold voltage of the first memory-diode comprises applying an electrical potential to the first memory-diode from higher to lower potential in the reverse direction of the memory-diode, and wherein the step of selecting the threshold value of the second memory-diode comprises applying an electrical potential to the second memory-diode from higher to lower potential in the reverse direction of the memory-diode, the electrical potential applied to the first memory-diode being different from the electrical potential applied to the second memory-diode.

28. A method of undertaking a procedure on first and second memory-diodes comprising:

selecting a forward direction threshold voltage of the first memory-diode; and

selecting a forward direction threshold voltage of the second memory-diode, the selected threshold voltage of the first memory-diode being different from the selected threshold voltage of the second memory-diode, and further comprising reading the state of each of the first and second memory-diodes, wherein reading the state of each of the first and second memory-diodes comprises applying a read current of substantially the same magnitude through each memory-diode in the forward direction thereof, wherein the step of selecting the threshold voltage of the first memory-diode comprises applying an electrical potential to the first memory-diode from higher to lower potential in the reverse direction of the memory-diode, and wherein the step of selecting the threshold value of the second memory-diode comprises applying an electrical potential to the second memory-diode from higher to lower potential in the reverse direction of the memory-diode, the electrical potential applied to the first memory-diode being different from the electrical potential applied to the second memory-diode.

29. A memory structure comprising a first memory device comprising a pair of electrodes and an active layer therebetween, the first memory device having a selected first threshold voltage, and a second memory device comprising a pair of electrodes and an active layer therebetween, the second memory device having a selected second threshold voltage, the first threshold voltage being different from the second threshold voltage.

30. The memory structure of claim 29 and further comprising a third memory device comprising a pair of electrodes and an active layer therebetween and having a third threshold voltage, the first, second and third threshold voltages being different from each other.

31. The memory structure of claim 30 and further comprising a fourth memory device comprising a pair of electrodes and an active layer therebetween and having a fourth threshold voltage, the first, second, third and fourth threshold voltages being different from each other.

32. A memory array comprising;

a first plurality of conductors;

a second plurality of conductors, and;

a plurality of memory-diodes, each connecting a conductor of the first plurality thereof with a conductor of the second plurality thereof, wherein a first memory-diode of the plurality thereof has a selected first threshold voltage, and a second memory-diode of the plurality thereof has a selected second threshold voltage different from the first threshold voltage.

33. The memory array of claim 32 and further wherein a third memory-diode of the plurality thereof has a third threshold voltage, the first, second and third threshold voltages being different from each other.

34. The memory array of claim 33 and further wherein a fourth memory-diode of the plurality thereof has a fourth threshold voltage, the first, second, third and fourth threshold voltages being different from each other.

35. A method of undertaking a procedure on a memory-diode comprising:

providing a memory-diode having a threshold voltage; and

tracking variation of the threshold voltage of the memory-diode;

further comprising undertaking a read process of the memory-diode, and varying the read process in response to tracking of the variation of the threshold voltage.

36. The method of claim 35 wherein the threshold voltage of the memory-diode is determined by applying an electrical potential across the memory-diode from higher to lower potential in the reverse direction of the memory-diode.

37. The method of claim 35 wherein the variation of the threshold voltage is time-dependent.

Assignments (8)