IP Library Granted Patent US 7,277,336
Granted Patent B2
US 7,277,336 · App. 11/024,516 · Granted Oct 2, 2007

Method and apparatus for improving yield in semiconductor devices by guaranteeing health of redundancy information

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Quick Facts
Patent No.
US 7,277,336
App. No.
11/024,516
Granted
Oct 2, 2007
Kind
B2
Abstract

A method is provided comprising reading a set of memory cells indicating whether stored redundancy information is reliable and, if the set of memory cells indicates that the stored redundancy information is reliable, determining whether to read primary memory or redundant memory based on the stored redundancy information. Another method is provided comprising reading a set of memory cells associated with a group of memory cells in a primary memory, the set of memory cells indicating whether data can be reliably stored in the group of memory cells; if the set of memory cells indicates that data can be reliably stored in the group of memory cells, storing data in the group of memory cells; and if the set of memory cells does not indicate that data can be reliably stored in the group of memory cells, storing data in a group of memory cells in a redundant memory. In another preferred embodiment, a method for providing memory redundancy is provided.

Claims (27)

1. A method for writing to memory, the method comprising:

(a) reading a set of memory cells in an area of memory that stores redundancy information for a group of memory cells in a primary memory, the set of memory cells indicating whether the area of memory is able to reliably store redundancy information, if the set of memory cells indicates that the area of memory is able to reliably store redundancy information, performing the following:

(b) reading the redundancy information, the redundancy information indicating whether the group of memory cells in the primary memory is able to reliably store data;

(c) if the redundancy information indicates that the group of memory cells in the primary memory is able to reliably store data, storing data in the group of memory cells in the primary memory; and

(d) if the redundancy information does not indicate that the group of memory cells in the primary memory is able to reliably store data, storing data in a redundant memory wherein the redundancy information comprises a first field for storing an indication of whether the redundant memory was written to, a second field for storing an indication of whether a write operation to the redundant memory was successful, and a third field for storing an address in the redundant memory.

2. The method of claim 1 , wherein (d) comprises storing data at an address of redundant memory identified by a direct mapping operation from an address associated with the redundancy information.

3. The method of claim 1 , wherein the memory cells are part of a three-dimensional memory array comprising a plurality of layers of memory cells vertically stacked over a silicon substrate.

4. The method of claim 1 further comprising, during sort flow of a memory array comprising the set of memory cells, attempting to program the set of memory cells.

5. The method of claim 1 further comprising, in the field, attempting to program the set of memory cells.

6. The method of claim 1 further comprising:

(e) if the set of memory cells does not indicate that the area of memory is able to reliably store redundancy information, attempting to store the data in a different group of memory cells in the primary memory.

7. A method for writing to memory, the method comprising:

(a) reading a set of memory cells in an area of memory that stores redundancy information for a group of memory cells in a primary memory, the set of memory cells indicating whether the area of memory is able to reliably store redundancy information;

(b) if the set of memory cells indicates that the area of memory is able to reliably store redundancy information, reading redundancy information stored in the area of memory to determine whether to store data in the group of memory cells in the primary memory or in a redundant memory; and

(c) if the set of memory cells does not indicate that the area of memory is able to reliably store redundancy information, attempting to store the data in a different group of memory cells in the primary memory wherein the redundancy information comprises a first field for storing an indication of whether the redundant memory was written to, a second field for storing an indication of whether a write operation to the redundant memory was successful, and a third field for storing an address in the redundant memory.

8. The method of claim 7 , wherein the memory cells are part of a three-dimensional memory array comprising a plurality of layers of memory cells vertically stacked over a silicon substrate.

9. The method of claim 7 further comprising, during sort flow of a memory array comprising the set of memory cells, attempting to program the set of memory cells.

10. The method of claim 7 further comprising, in the field, attempting to program the set of memory cells.

11. A method for writing to memory, the method comprising:

(a) reading a set of memory cells associated with a group of memory cells in a primary memory, the set of memory cells indicating whether the group of memory cells in the primary memory is able to reliably store data;

(b) if the set of memory cells indicates that the group of memory cells in the primary memory is able to reliably store data, storing data in the group of memory cells in the primary memory;

(c) if the set of memory cells does not indicate that the group of memory cells in the primary memory is able to reliably store data, storing data in a redundant memory; and

(d) storing redundancy information comprising a first field for storing an indication of whether the redundant memory was written to, a second field for storing an indication of whether a write operation to the redundant memory was successful, and a third field for storing an address in the redundant memory.

12. The method of claim 11 further comprising:

if there is an error in storing the data in (b) or (c), storing the data at a first address in the redundant memory.

13. The method of claim 12 , if the data is successfully stored in the first address in the redundant memory, storing an indication that the redundant memory was written to in the first field, storing an indication that the write operation to the redundant memory was successful in the second field, and storing the first address in the third field.

14. The method of claim 12 , if there is an error in storing the data in the first address in the redundant memory, generating an error.

Assignments (6)
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0980 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT LISTED PATENT NUMBER 8853569 TO THE CORRECT PATENT NUMBER 8883569 PREVIOUSLY RECORDED ON REEL 038300 FRAME 0665. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 25, 2016
From: SANDISK 3D LLC
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038520/0552 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2016
From: SANDISK 3D LLC.
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038300/0665 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECTIVE MERGER TO ADD PAGES TO THE MERGER DOCUMENT PREVIOUSLY RECORDED PREVIOUSLY RECORDED ON REEL 017544 FRAME 0769. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 2, 2007
From: MATRIX SEMICONDUCTOR, INC.
To: SANDISK 3D LLC
Reel/Frame 018950/0686 →
MERGER Recorded Apr 28, 2006
From: MATRIX SEMICONDUCTOR, INC.
To: SANDISK 3D LLC
Reel/Frame 017544/0769 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2005
From: ILKBAHAR, ALPER; BOSCH, DEREK J.
To: MATRIX SEMICONDUCTOR, INC.
Reel/Frame 016459/0910 →