IP Library Granted Patent US 7,317,307
Granted Patent B2
US 7,317,307 · App. 11/081,565 · Granted Jan 8, 2008

Circuit arrangement for load regulation in the receive path of a transponder

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Quick Facts
Patent No.
US 7,317,307
App. No.
11/081,565
Granted
Jan 8, 2008
Kind
B2
Abstract

A circuit arrangement for load regulation of circuit components is arranged in a receive path of a transponder, having an input path through which a first voltage signal can be tapped, having a voltage sensor arranged in the input path for measuring the first voltage signal, having at least one output path through which a discharge current signal can be tapped, having at least one controllable auxiliary current source arranged between the input path and the output path to provide the at least one discharge current signal, the control side of the auxiliary current source being connected to an output of the voltage sensor such that the value of the discharge current signal increases exponentially with increasing voltage of the first voltage signal.

Claims (14)

1. A circuit arrangement for load regulation of circuit components arranged in a receive path of a transponder, the circuit arrangement comprising:

an input path through which a first voltage signal can be tapped;

a voltage sensor arranged in the input path for measuring the first voltage signal;

at least one output path through which a discharge current signal can be tapped; and

at least one controllable auxiliary current source being arranged between the input path and the output path to provide the discharge current signal such that a value of the discharge current signal increases exponentially with increasing voltage of the first voltage signal, a control side of the auxiliary current source being connected to an output of the voltage sensor.

2. The circuit arrangement according to claim 1 , wherein the auxiliary current source is a current sink for providing a discharge current.

3. The circuit arrangement according to claim 1 , wherein the input path is arranged between a first input connection for coupling the input potential and a second connection having a supply potential, and wherein each of the at least one output paths is connected to an output connection of the circuit arrangement through which the discharge current signal can be tapped.

4. The circuit arrangement according to claim 3 , wherein the voltage sensor has at least one first diode that is connected in a forward direction relative to the first input connection.

5. The circuit arrangement according to claim 1 , wherein the auxiliary current source has at least one current mirror circuit that is arranged on an input side of the input path and that is connected on an output side with an output connection of the circuit arrangement.

6. The circuit arrangement according to claim 5 , wherein at least one second diode of the voltage sensor is formed of a diode of the current mirror circuit and is connected in series with the other diodes of the voltage sensor.

7. The circuit arrangement according to claim 6 , wherein at least one of the diodes of the voltage sensor and/or at least one of the diodes of the auxiliary current source is a pn diode, a MOS diode, or a Schottky diode.

8. The circuit arrangement according to claim 1 , wherein the voltage sensor has three diodes connected in series to one another.

9. The circuit arrangement according to claim 1 , wherein transistors of the voltage sensor and/or transistors of the auxiliary current source are MOSFET transistors or CMOS transistors.

10. The circuit arrangement according to claim 3 , wherein the supply potential is a reference potential or a reference ground potential.

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
PATENT SECURITY AGREEMENT Recorded Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2011
From: ATMEL AUTOMOTIVE GMBH
To: ATMEL CORPORATION
Reel/Frame 025899/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2009
From: ATMEL GERMANY GMBH
To: ATMEL AUTOMOTIVE GMBH
Reel/Frame 023209/0021 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2005
From: FISCHER, MARTIN
To: ATMEL GERMANY GMBH
Reel/Frame 016507/0991 →