IP Library Patent Application 11125000
Patent Application
App. No. 11/125,000

Methods and apparatus for dynamically reconfiguring a charge pump during output transients

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Quick Facts
Patent No.
US None
App. No.
11/125,000
Abstract

Methods and apparatus are described for dynamically controlling a charge pump system including a plurality of charge pump stages, with each charge pump stage coupled between an input voltage V IN at an input voltage node and an output voltage V OUT at an output voltage node. In particular, the configuration of the charge pump stages may be dynamically controlled during a transition on V OUT from a first voltage to a second voltage to improve the circuit's transient response.

Claims (46)

1 . A method for controlling a charge pump system comprising a plurality of charge pump stages, each charge pump stage coupled between an input voltage V IN at an input voltage node and an output voltage V OUT at an output voltage node, the method comprising:

changing a configuration of the charge pump stages during a transition on V OUT from a first voltage to a second voltage.

2 . The method of claim 1 , wherein changing the configuration comprises coupling one of the charge pump stages to the input voltage node and the output voltage node to increase V OUT to a first intermediate voltage between the first and second voltages.

3 . The method of claim 1 , wherein changing the configuration comprises coupling a first plurality of the charge pump stages to the input voltage node and the output voltage node to increase V OUT to a first intermediate voltage between the first and second voltages.

4 . The method of claim 3 , wherein changing the configuration further comprises coupling a second plurality of the charge pump stages to the input voltage node and the output voltage node to increase V OUT to a second intermediate voltage between the first and second voltages.

5 . The method of claim 1 , wherein changing the configuration comprises coupling one of the charge pump stages to the input voltage node and the output voltage node during a first time interval during the transition on V OUT from the first voltage to the second voltage.

6 . The method of claim 1 , wherein changing the configuration comprises coupling a first plurality of the charge pump stages to the input voltage node and the output voltage node during a first time interval during the transition on V OUT from the first voltage to the second voltage.

7 . The method of claim 6 , wherein changing the configuration further comprises coupling a second plurality of the charge pump stages to the input voltage node and the output voltage node during a second time interval during the transition on V OUT from the first voltage to the second voltage.

8 . The method of claim 1 , wherein changing the configuration comprises controlling a number of the charge pump stages coupled to the input voltage node and the output voltage node during the transition on V OUT from the first voltage to the second voltage.

9 . The method of claim 1 , wherein changing the configuration comprises controlling a frequency of a clock signal supplied to the charge pump stages during the transition on V OUT from the first voltage to the second voltage.

10 . The method of claim 9 , wherein controlling the clock frequency comprises providing a first clock signal at a first frequency to the charge pump stages to increase V OUT to a first intermediate voltage between the first and second voltages.

11 . The method of claim 10 , wherein controlling the clock frequency further comprises providing a second clock signal at a second frequency to the charge pump stages to increase V OUT to a second intermediate voltage between the first and second voltages.

12 . The method of claim 9 , wherein controlling the clock frequency comprises providing a first clock signal at a first frequency to the charge pump stages during a first time interval during the transition on V OUT from the first voltage to the second voltage.

13 . The method of claim 9 , wherein controlling the clock frequency further comprises providing a second clock signal at a second frequency to the charge pump stages during a second time interval during the transition on V OUT from the first voltage to the second voltage.

14 . The method of claim 1 , wherein:

the charge pump system supplies an output current I OUT at the output voltage node; and

changing the configuration maximizes the output current I OUT during a transition on V OUT from a first voltage to a second voltage.

15 . The method of claim 1 , wherein

the charge pump system receives an input current I IN at the input node, and supplies an output current I OUT at the output voltage node; and

changing the configuration limits input current I IN requirements.

16 . The method of claim 1 , wherein changing the configuration comprises:

coupling a first plurality of the charge pump stages in series during a first time interval during the transition on V OUT from the first voltage to the second voltage; and

coupling a second plurality of the charge pump stages in series during a second time interval during the transition on V OUT from the first voltage to the second voltage.

17 . A charge pump system comprising a plurality of charge pump stages, each charge pump stage coupled between an input voltage V IN at an input voltage node and an output voltage V OUT at an output voltage node, the charge pump system comprising:

means for dynamically controlling a configuration of the charge pump stages during a transition on V OUT from a first voltage to a second voltage.

18 . The system of claim 17 , wherein the means for dynamically controlling comprises means for coupling one of the charge pump stages to the input voltage node and the output voltage node to increase V OUT to a first intermediate voltage between the first and second voltages.

19 . The system of claim 17 , wherein the means for dynamically controlling comprises means for coupling a first plurality of the charge pump stages to the input voltage node and the output voltage node to increase V OUT to a first intermediate voltage between the first and second voltages.

20 . The system of claim 19 , wherein the means for dynamically controlling further comprises means for coupling a second plurality of the charge pump stages to the input voltage node and the output voltage node to increase V OUT to a second intermediate voltage between the first and second voltages.

21 . The system of claim 17 , wherein the means for dynamically controlling comprises means for coupling one of the charge pump stages to the input voltage node and the output voltage node during a first time interval during the transition on V OUT from the first voltage to the second voltage.

22 . The system of claim 17 , wherein the means for dynamically controlling comprises means for coupling a first plurality of the charge pump stages to the input voltage node and the output voltage node during a first time interval during the transition on V OUT from the first voltage to the second voltage.

23 . The system of claim 22 , wherein the means for dynamically controlling further comprises means for coupling a second plurality of the charge pump stages to the input voltage node and the output voltage node during a second time interval during the transition on V OUT from the first voltage to the second voltage.

24 . The system of claim 17 , wherein the means for dynamically controlling comprises means for controlling a number of the charge pump stages coupled to the input voltage node and the output voltage node during the transition on V OUT from the first voltage to the second voltage.

25 . The system of claim 17 , wherein the means for dynamically controlling comprises means for controlling a frequency of a clock signal supplied to the charge pump stages during the transition on V OUT from the first voltage to the second voltage.

26 . The system of claim 25 , wherein the means controlling the clock frequency comprises means for providing a first clock signal at a first frequency to the charge pump stages to increase V OUT to a first intermediate voltage between the first and second voltages.

27 . The system of claim 25 , wherein the means for controlling the clock frequency further comprises means for providing a second clock signal at a second frequency to the charge pump stages to increase V OUT to a second intermediate voltage between the first and second voltages.

28 . The system of claim 25 , wherein the means for controlling the clock frequency comprises means for providing a first clock signal at a first frequency to the charge pump stages during a first time interval during the transition on V OUT from the first voltage to the second voltage.

29 . The system of claim 25 , wherein the means for controlling the clock frequency further comprises means for providing a second clock signal at a second frequency to the charge pump stages during a second time interval during the transition on V OUT from the first voltage to the second voltage.

30 . The system of claim 17 , wherein:

the charge pump system supplies an output current I OUT at the output voltage node; and

the means for dynamically controlling maximizes the output current I OUT during a transition on V OUT from a first voltage to a second voltage.

31 . The system of claim 17 , wherein

the charge pump system receives an input current I IN at the input node, and supplies an output current I OUT at the output voltage node; and

the means for dynamically controlling limits input current I IN requirements.

32 . The system of claim 17 , wherein the means for changing the configuration comprises:

means for coupling a first plurality of the charge pump stages in series during a first time interval during the transition on V OUT from the first voltage to the second voltage; and

means for coupling a second plurality of the charge pump stages in series during a second time interval during the transition on V OUT from the first voltage to the second voltage.

Assignments (6)
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0980 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT LISTED PATENT NUMBER 8853569 TO THE CORRECT PATENT NUMBER 8883569 PREVIOUSLY RECORDED ON REEL 038300 FRAME 0665. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 25, 2016
From: SANDISK 3D LLC
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038520/0552 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2016
From: SANDISK 3D LLC.
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038300/0665 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECTIVE MERGER TO ADD PAGES TO THE MERGER DOCUMENT PREVIOUSLY RECORDED PREVIOUSLY RECORDED ON REEL 017544 FRAME 0769. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 2, 2007
From: MATRIX SEMICONDUCTOR, INC.
To: SANDISK 3D LLC
Reel/Frame 018950/0686 →
MERGER Recorded Apr 28, 2006
From: MATRIX SEMICONDUCTOR, INC.
To: SANDISK 3D LLC
Reel/Frame 017544/0769 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2005
From: THORP, TYLER; SO, KENNETH K.; SCHEUERLEIN, ROY E.
To: MATRIX SEMICONDUCTOR, INC.
Reel/Frame 016554/0629 →