IP Library Granted Patent US 7,276,403
Granted Patent B2
US 7,276,403 · App. 11/237,162 · Granted Oct 2, 2007

Selective oxidation of silicon in diode, TFT, and monolithic three dimensional memory arrays

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Quick Facts
Patent No.
US 7,276,403
App. No.
11/237,162
Granted
Oct 2, 2007
Kind
B2
Abstract

The present invention relates to use of selective oxidation to oxidize silicon in the presence of tungsten and/or tungsten nitride in memory cells and memory arrays. This technique is especially useful in monolithic three dimensional memory arrays. In one aspect of the invention, the silicon of a diode-antifuse memory cell is selectively oxidized to repair etch damage and reduce leakage, while exposed tungsten of adjacent conductors and tungsten nitride of a barrier layer are not oxidized. In some embodiments, selective oxidation may be useful for gap fill. In another aspect of the invention, TFT arrays made up of charge storage memory cells comprising a polysilicon/tungsten nitride/tungsten gate can be subjected to selective oxidation to passivate the gate polysilicon and reduce leakage.

Claims (9)

1. A method for forming a thin film transistor, the method comprising:

providing a first polysilicon film;

forming a gate of the thin film transistor over the polysilicon film, the gate comprising silicon and tungsten or tungsten nitride; and

oxidizing a portion of the silicon in the presence of a surface of the tungsten or tungsten nitride in conditions that substantially do not oxidize the tungsten or tungsten nitride, wherein the thin film transistor is a memory cell.

2. The method of claim 1 wherein the memory cell is a floating gate cell.

3. The method of claim 1 wherein the memory cell is a SONOS-type cell.

4. The method of claim 1 wherein the memory cell is a portion of a first memory level formed at a first height above a substrate.

5. The method of claim 4 wherein the first memory level is a portion of a monolithic three dimensional memory array, the array further comprising a second memory level, the second memory level formed at a second height above the substrate, wherein the second height is different from the first height.

6. The method of claim 1 wherein the oxidizing step comprises flowing H 2 and H 2 O, and wherein a ratio of partial pressure of H 2 to partial pressure of H 2 O is at least about 3:1.

Assignments (5)
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0980 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT LISTED PATENT NUMBER 8853569 TO THE CORRECT PATENT NUMBER 8883569 PREVIOUSLY RECORDED ON REEL 038300 FRAME 0665. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 25, 2016
From: SANDISK 3D LLC
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038520/0552 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2016
From: SANDISK 3D LLC.
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038300/0665 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECTIVE MERGER TO ADD PAGES TO THE MERGER DOCUMENT PREVIOUSLY RECORDED PREVIOUSLY RECORDED ON REEL 017544 FRAME 0769. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 2, 2007
From: MATRIX SEMICONDUCTOR, INC.
To: SANDISK 3D LLC
Reel/Frame 018950/0686 →
MERGER Recorded Apr 28, 2006
From: MATRIX SEMICONDUCTOR, INC.
To: SANDISK 3D LLC
Reel/Frame 017544/0769 →