IP Library Granted Patent US 7,541,220
Granted Patent B2
US 7,541,220 · App. 11/302,690 · Granted Jun 2, 2009

Integrated circuit device having flexible leadframe

Assignee: Agere Systems Inc.
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Quick Facts
Patent No.
US 7,541,220
App. No.
11/302,690
Granted
Jun 2, 2009
Kind
B2
Abstract

An integrated circuit device having a flexible leadframe, and techniques for fabricating the flexible leadframe and integrated circuit device, are provided. In one aspect of the invention, an integrated circuit device comprises a heat spreader having a top surface and a bottom surface. At least one integrated circuit die is attached to the top surface of the heat spreader. A flexible leadframe is also attached to the top surface of the heat spreader. The flexible leadframe has one or more flexible layers, including at least one flexible insulating layer. A plurality of electrically conductive traces are defined on the at least one flexible insulating layer.

Claims (28)

1. A method of producing a flexible leadframe, the flexible leadframe comprising a plurality of stacked flexible layers including at least one flexible insulating layer, the method comprising the steps of:

defining a plurality of electrically conductive traces on the at least one flexible insulating layer;

embedding at least one circuit component; and

configuring the flexible layers for use as a flexible leadframe in an integrated circuit device;

wherein a first one of the flexible layers overlays a first portion of a second one of the flexible layers;

wherein a second portion of the second flexible layer remains exposed through an opening in the first flexible layer; and

wherein the second portion of the second flexible layer is configured for receiving at least one electrical connection to an integrated circuit die.

2. The method of claim 1 , wherein two or more flexible layers are laminated.

3. The method of claim 1 , wherein the one or more flexible layers comprise at least one polyimide layer.

4. The method of claim 1 , wherein the at least one embedded circuit component comprises one or more signal filters.

5. The method of claim 1 , wherein the at least one embedded circuit component comprises one or more tuning capacitors.

6. The method of claim 1 , wherein the at least one embedded circuit component comprises one or more inductors.

7. The method of claim 1 , wherein the opening in the first flexible layer overlays an interior area of the flexible leadframe.

8. The method of claim 7 , wherein the interior area is configured for receiving the at least one integrated circuit die.

9. A method of producing an integrated circuit device with a flexible leadframe comprising the steps of:

attaching at least one integrated circuit die to a top surface of a heat spreader;

attaching a flexible leadframe to the top surface of the heat spreader, wherein the flexible leadframe comprises a plurality of stacked flexible layers including at least one flexible insulating layer, a first one of the flexible layers overlaying a first portion of a second one of the flexible layers, a second portion of the second flexible layer remaining exposed through an opening in the first flexible layer, a plurality of electrically conductive traces defined on the at least one flexible insulating layer, and at least one embedded circuit component, wherein the one or more flexible layers are configured for use as a flexible leadframe in an integrated circuit device; and electrically connecting the integrated circuit die to the second portion of the second flexible layer of the flexible leadframe.

10. The method of claim 9 , wherein the flexible leadframe comprises an interior area configured for receiving the at least one integrated circuit die.

11. The method of claim 10 , further comprising the step of filling the interior area with a dielectric material.

12. The method of claim 10 , further comprising the step of attaching a lid to the flexible leadframe, thereby enclosing the interior area.

13. The method of claim 12 , wherein the lid comprises at least one of metal, plastic, polyimide, plastic with metal coating, and ceramic.

14. The method of claim 9 , wherein the step of attaching the leadframe occurs before the step of attaching the integrated circuit die to the top surface of the heat spreader.

15. The method of claim 9 , wherein the step of attaching the integrated circuit die occurs before the step of attaching the leadframe to the top surface of the head spreader.

16. The method of claim 9 , wherein the step of electrically connecting the integrated circuit die to the second portion of the second flexible layer of the flexible leadframe comprises wire bonding the integrated circuit die to the second portion of the second flexible layer of the flexible leadframe.

17. The method of claim 9 , wherein the at least one embedded circuit component comprises one or more signal filters.

18. The method of claim 9 , wherein the at least one embedded circuit component comprises one or more tuning capacitors.

19. The method of claim 9 , wherein the at least one embedded circuit component comprises one or more inductors.

20. The method of claim 9 , wherein the opening in the first flexible layer overlays an interior area of the flexible leadframe.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 059723/0382 →
SECURITY INTEREST Recorded Feb 1, 2018
From: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 045216/0020 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044886/0766 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: AGERE SYSTEMS LLC
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035365/0634 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
Continuity (1)
Related Publication 20060097367A1 · May 11, 2006