IP Library Granted Patent US 7,342,316
Granted Patent B2
US 7,342,316 · App. 11/339,540 · Granted Mar 11, 2008

Cross-fill pattern for metal fill levels, power supply filtering, and analog circuit shielding

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Quick Facts
Patent No.
US 7,342,316
App. No.
11/339,540
Granted
Mar 11, 2008
Kind
B2
Abstract

A cross-fill metal fill pattern technique is provided such that portions of a metal fill pattern are patterned to accomplish a secondary function. For instance, in the exemplary embodiments, ever other trace or line of interdigitated fingers is routed to a ground, while the interceding traces or lines of interdigitated fingers are routed to a power supply. In this way, a capacitor function is formed across the power supply, providing additional decoupling for the power supply. Moreover, a suitably tight cross-fill metal fill pattern (i.e., higher density of metal) provides an electrical shielding function for electromagnetic radiation passing therethrough.

Claims (52)

1. An integrated circuit including a metal fill pattern comprising:

a first plurality of curved metal traces electrically connected to a power supply pad;

a second plurality of curved metal traces electrically connected to a ground pad; and

over-routing signal bearing metal lines over said first plurality of metal traces and said second plurality of metal traces;

wherein said second plurality of metal traces are interdigitated between said first plurality of metal traces to form a purposeful inter-metal capacitance therebetween and to provide electromagnetic shielding to protect circuitry therebelow from said over-routed signal bearing metal lines.

2. The integrated circuit including a metal fill pattern according to claim 1 , wherein:

said circuitry therebelow includes an analog circuit.

3. The integrated circuit including a metal fill pattern according to claim 1 , further comprising:

a first plurality of traces crossing each of said first plurality of metal traces; and

a second plurality of traces crossing each of said second plurality of metal traces.

4. The integrated circuit including a metal fill pattern according to claim 3 , wherein:

said first plurality of traces each form a perpendicular angle with respect to an electrically connected one of said first plurality of metal traces.

5. The integrated circuit including a metal fill pattern according to claim 4 , wherein:

said second plurality of traces each form a perpendicular angle with respect to an electrically connected one of said second plurality of metal traces.

6. The integrated circuit including a metal fill pattern according to claim 4 , wherein:

a portion of said first plurality of metal traces connected to a number of said first plurality of traces forms a straight line.

7. The integrated circuit including a metal fill pattern according to claim 6 , wherein:

another portion of said first plurality of metal traces connected to others of said first plurality of traces forms a curving line.

8. The integrated circuit including a metal fill pattern according to claim 4 , wherein:

a portion of said first plurality of metal traces connected to a number of said first plurality of traces forms a curving line.

9. The integrated circuit including a metal fill pattern according to claim 1 , wherein:

said metal fill pattern forms a coverage density of at least 50%.

10. The integrated circuit including a metal fill pattern according to claim 1 , wherein:

said first plurality of metal traces and said second plurality of metal traces are linear.

11. The integrated circuit including a metal fill pattern according to claim 10 , wherein:

said first plurality of metal traces and said second plurality of metal traces run along a generally straight line.

12. An integrated circuit including a metal fill pattern comprising:

a first plurality of various length metal traces electrically connected to a power supply pad;

a second plurality of various length metal traces electrically connected to a ground pad; and

over-routing signal bearing metal lines over said first plurality of metal traces and said second plurality of metal traces;

wherein said second plurality of metal traces are interdigitated between said first plurality of metal traces to form a purposeful inter-metal capacitance therebetween and to provide electromagnetic shielding to protect circuitry therebelow from said over-routed signal bearing metal lines.

13. The integrated circuit including a metal fill pattern according to claim 12 , wherein:

said circuitry therebelow includes an analog circuit.

14. The integrated circuit including a metal fill pattern according to claim 12 , further comprising:

a first plurality of traces crossing each of said first plurality of metal traces; and

a second plurality of traces crossing each of said second plurality of metal traces.

15. The integrated circuit including a metal fill pattern according to claim 14 , wherein:

said first plurality of traces each form a perpendicular angle with respect to an electrically connected one of said first plurality of metal traces.

16. The integrated circuit including a metal fill pattern according to claim 15 , wherein:

said second plurality of traces each form a perpendicular angle with respect to an electrically connected one of said second plurality of metal traces.

17. The integrated circuit including a metal fill pattern according to claim 15 , wherein:

a portion of said first plurality of metal traces connected to a number of said first plurality of traces forms a straight line.

18. The integrated circuit including a metal fill pattern according to claim 17 , wherein:

another portion of said first plurality of metal traces connected to others of said first plurality of traces forms a curving line.

19. The integrated circuit including a metal fill pattern according to claim 15 , wherein:

a portion of said first plurality of metal traces connected to a number of said first plurality of traces forms a curving line.

20. The integrated circuit including a metal fill pattern according to claim 12 , wherein:

said metal fill pattern forms a coverage density of at least 50%.

21. The integrated circuit including a metal fill pattern according to claim 20 , wherein:

said first plurality of metal traces and said second plurality of linear metal traces run along a generally straight line.

22. The integrated circuit including a metal fill pattern according to claim 12 , wherein:

said first plurality of metal traces and said second plurality of metal traces are linear.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 059720/0719 →
SECURITY INTEREST Recorded Feb 1, 2018
From: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 045216/0020 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044886/0608 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: AGERE SYSTEMS LLC
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035365/0634 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2006
From: BOOTH, RICHARD; DAZZO, JR., DONALD
To: AGERE SYSTEMS INC.
Reel/Frame 017514/0509 →