Vertically stacked field programmable nonvolatile memory and method of fabrication
View Patent ↗A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus masking steps needed for contacts. Maximum use of self alignment techniques minimizes photolithographic limitations. In one embodiment the peripheral circuits are formed in a silicon substrate and an N level array is fabricated above the substrate.
1. A process for fabricating a 3-D semiconductor memory device comprising the steps of:
forming a first stack comprising a P-N diode and a state change element;
forming a second stack comprising a P-N diode and a state change element overlying the first stack,
wherein the first and second stacks comprise elements of a pillar in a 3-D memory array, wherein the 3-D memory array comprises a plurality of layers of memory cells stacked vertically above one another, and
forming edge regions on the pillar using a plasma oxidation process.
2. The process of claim 1 , wherein forming a first stack comprises:
forming a bottom conductor layer;
forming a bottom semiconductor layer overlying the conductor layer;
oxidizing at least a portion of the bottom semiconductor layer in a plasma to form an oxide layer thereon;
forming a top semiconductor layer overlying the oxide layer; and
sequentially etching the top semiconductor layer, the oxide layer, the bottom semiconductor layer and the bottom conductor layer.
3. A process for fabricating a pillar in a 3-D semiconductor memory device, wherein the pillar includes a P-N diode and a state change element vertically arranged between orthogonally disposed conductors leads, the process comprising the steps of:
forming a semiconductor layer; and
oxidizing at least a portion of the semiconductor layer in a plasma to form an oxide antifuse layer overlying the semiconductor layer;
wherein the 3-D semiconductor memory device comprises a plurality of layers of memory cells stacked vertically above one another.