Low thermal resistance assembly for flip chip applications
View Patent ↗An assembly comprises a stiffener, a circuit substrate and an integrated circuit (IC) chip. The stiffener has a surface with a first region and a second region. The circuit substrate covers the first region, while the IC chip overlies at least a portion of each of the first and second regions. Moreover, the assembly further comprises a plurality of first solder bumps and a plurality of second solder bumps. The first solder bumps contact both the IC chip and the circuit substrate. The second solder bumps are larger than the first solder bumps, contact the IC chip and are disposed above the second region of the stiffener.
1. An assembly comprising:
a stiffener, the stiffener having a surface with a first region and a second region;
a circuit substrate, the circuit substrate covering the first region;
an integrated circuit chip, the integrated circuit chip overlying at least a portion of each of the first and second regions;
a plurality of first solder bumps, the first solder bumps contacting the integrated circuit chip and the circuit substrate; and
a plurality of second solder bumps, the second solder bumps being larger than the first solder bumps, contacting the integrated circuit chip and being disposed above the second region;
wherein the circuit substrate has an aperture formed therethrough over the second region; and
wherein the plurality of second solder bumps are arranged within the aperture in the form of an array of solder bumps.
2. The assembly of claim 1 , wherein the second solder bumps contact the second region.
3. The assembly of claim 1 , wherein the first solder bumps are operative to conduct electrical signals between the integrated circuit chip and the circuit substrate.
4. The assembly of claim 1 , wherein the second solder bumps are operative to conduct heat from the integrated circuit chip to the stiffener.
5. The assembly of claim 1 , wherein the second region is substantially square or is substantially rectangular.
6. The assembly of claim 1 , wherein the first region substantially surrounds a periphery of the second region.
7. The assembly of claim 1 , wherein the circuit substrate comprises a plurality of conductive traces.
8. The assembly of claim 7 , wherein at least one of the first solder bumps is attached to at least one of the conductive traces.
9. The assembly of claim 1 , wherein the second solder bumps have an average standoff height that is at least two times larger than an average standoff height of the first solder bumps.
10. The assembly of claim 1 , wherein the second solder bumps have an average standoff height that is at least three times larger than an average standoff height of the first solder bumps.
11. The assembly of claim 1 , wherein the first solder bumps are proximate to one or more peripheral edges of the integrated circuit chip.
12. The assembly of claim 1 , further comprising an underfill, the underfill filling at least a portion of a space between the integrated circuit chip and the circuit substrate.
13. The assembly of claim 1 , wherein the stiffener comprises a metal.
14. The assembly of claim 1 , wherein the stiffener comprises aluminum, copper, gold or silver, or a combination of one or more thereof.
15. The assembly of claim 1 , wherein the circuit substrate is substantially flexible.
16. The assembly of claim 1 , wherein the circuit substrate is substantially rigid.
17. The assembly of claim 1 , wherein two or more of the second solder bumps are in physical contact with one another.
18. The assembly of claim 1 , wherein the second solder bumps comprise a solder having a thermal conductivity greater than about 30 Watts per meter-Kelvin (W/(m-K)).
19. An apparatus including:
an assembly, the assembly comprising:
a stiffener, the stiffener having a surface with a first region and a second region;
a circuit substrate, the circuit substrate covering the first region;
an integrated circuit chip, the integrated circuit chip overlying at least a portion of each of the first and second regions;
a plurality of first solder bumps, the first solder bumps contacting the integrated circuit chip and the circuit substrate;
a plurality of second solder bumps, the second solder being larger than the first solder bumps and contacting the integrated circuit chip and the second region;
wherein the circuit substrate has an aperture formed therethrough over the second region; and
wherein the plurality of second solder bumps are arranged within the aperture in the form of an array of solder bumps; and
a support structure, the support structure attached to the stiffener and operative to dissipate heat generated by the integrated circuit chip.
20. A method of forming an assembly, the method comprising the steps of:
forming a stiffener, the stiffener having a surface with a first region and a second region;
forming a circuit substrate, the circuit substrate covering the first region;
forming an integrated circuit chip, the integrated circuit chip overlying at least a portion of each of the first and second regions;
forming a plurality of first solder bumps, the first solder bumps contacting the integrated circuit chip and the circuit substrate; and
forming a plurality of second solder bumps, the second solder bumps being larger than the first solder bumps, contacting the integrated circuit chip and being disposed above the second region;
wherein the circuit substrate has an aperture formed therethrough over the second region; and
wherein the plurality of second solder bumps are arranged within the aperture in the form of an array of solder bumps.