IP Library Granted Patent US 7,587,703
Granted Patent B2
US 7,587,703 · App. 11/509,617 · Granted Sep 8, 2009

Layout determination method, method of manufacturing semiconductor devices, and computer readable program

Assignee: Fujitsu Microelectronics Limited
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Quick Facts
Patent No.
US 7,587,703
App. No.
11/509,617
Granted
Sep 8, 2009
Kind
B2
Abstract

A layout determination method determines a layout of semiconductor devices that are to be created on a substrate by carrying out an exposure process. The layout determination method determines a number of semiconductor devices to be created on one substrate, based on exposure data of the semiconductor devices, a time limit of delivery of the semiconductor devices and a number of substrates to be used for production of the semiconductor devices, obtains coordinates of semiconductor devices arrangeable on the substrate, based on the exposure data, and determines the layout of the semiconductor devices to be created on the substrate, based on the exposure data, the number of semiconductor devices and the coordinates of the semiconductor devices.

Claims (60)

1. A layout determination method for determining a layout of semiconductor devices that are to be created on a substrate by carrying out an exposure process, comprising:

(a) determining a number of semiconductor devices to be created on one substrate using a computer, based on exposure data of the semiconductor devices, a time limit of delivery of the semiconductor devices and a number of substrates to be used for production of the semiconductor devices;

(b) obtaining coordinates of semiconductor devices arrangeable on the substrate, based on the exposure data; and

(c) determining the layout of the semiconductor devices to be created on the substrate, based on the exposure data, the number of semiconductor devices and the coordinates of the semiconductor devices,

wherein said step (a) calculates the number of semiconductor devices to be created on one substrate, based on a time required for exposure per one semiconductor device, an exposure time per one layer of each semiconductor device, a total number of shots per one semiconductor device, and an exposure time per one shot.

2. The layout determination method as claimed in claim 1 , wherein said step (c) arranges the semiconductor devices to be created on the substrate with priority starting from a central portion on the substrate.

3. The layout determination method as claimed in claim 1 , wherein said step (c) arranges dummy patterns in a periphery of the semiconductor devices to be created on the substrate.

4. A layout determination method for determining a layout of semiconductor devices that are to be created on a substrate by carrying out an exposure process, comprising:

(a) determining a number of semiconductor devices to be created on one substrate using a computer, based on exposure data of the semiconductor devices, a time limit of delivery of the semiconductor devices and a number of substrates to be used for production of the semiconductor devices;

(b) obtaining coordinates of semiconductor devices arrangeable on the substrate, based on the exposure data; and

(c) determining the layout of the semiconductor devices to be created on the substrate, based on the exposure data, the number of semiconductor devices and the coordinates of the semiconductor devices,

wherein said step (a) calculates the number of semiconductor devices to be created on one substrate, based on a number of shots per one layer of each semiconductor device, a number of layers of each semiconductor device, a total number of shots per one semiconductor device, and a yield of the semiconductor devices.

5. The layout determination method as claimed in claim 4 , wherein said step (c) arranges the semiconductor devices to be created on the substrate with priority starting from a central portion on the substrate.

6. The layout determination method as claimed in claim 4 , wherein said step (c) arranges dummy patterns in a periphery of the semiconductor devices to be created on the substrate.

7. A method of manufacturing semiconductor devices, comprising:

(a) determining a number of semiconductor devices to be created on one substrate using a computer, based on exposure data of semiconductor devices, time limit of delivery of the semiconductor devices and a number of substrates used for production of the semiconductor devices;

(b) obtaining coordinates of semiconductor devices arrangeable on the substrate, based on the exposure data;

(c) determining a layout of the semiconductor devices to be created on the substrate, based on the exposure data, the number of semiconductor devices and the coordinates of the semiconductor devices; and

(d) exposing patterns of the exposure data on the substrate, based on the layout,

wherein said step (a) calculates the number of semiconductor devices to be created on one substrate, based on a time required for exposure per one semiconductor device, an exposure time per one layer of each semiconductor device, a total number of shots per one semiconductor device, and an exposure time per one shot.

8. The method of manufacturing semiconductor devices as claimed in claim 7 , wherein said step (c) arranges the semiconductor devices to be created on the substrate with priority starting from a central portion on the substrate.

9. The method of manufacturing semiconductor devices as claimed in claim 7 , wherein said step (c) arranges dummy patterns in a periphery of the semiconductor devices to be created on the substrate.

10. A method of manufacturing semiconductor devices, comprising:

(a) determining a number of semiconductor devices to be created on one substrate using a computer, based on exposure data of semiconductor devices, time limit of delivery of the semiconductor devices and a number of substrates used for production of the semiconductor devices;

(b) obtaining coordinates of semiconductor devices arrangeable on the substrate, based on the exposure data;

(c) determining a layout of the semiconductor devices to be created on the substrate, based on the exposure data, the number of semiconductor devices and the coordinates of the semiconductor devices; and

(d) exposing patterns of the exposure data on the substrate, based on the layout,

wherein said step (a) calculates the number of semiconductor devices to be created on one substrate, based on a number of shots per one layer of each semiconductor device, a number of layers of each semiconductor device, a total number of shots per one semiconductor device, and a yield of the semiconductor devices.

11. The method of manufacturing semiconductor devices as claimed in claim 10 , wherein said step (c) arranges the semiconductor devices to be created on the substrate with priority starting from a central portion on the substrate.

12. The method of manufacturing semiconductor devices as claimed in claim 10 , wherein said step (c) arranges dummy patterns in a periphery of the semiconductor devices to be created on the substrate.

13. A computer-readable program for causing a computer to determine a layout of semiconductor devices that are to be created on a substrate by carrying out an exposure process, said computer-readable program comprising:

a number determining procedure causing the computer to determine a number of semiconductor devices to be created on one substrate, based on exposure data of the semiconductor devices, a time limit of delivery of the semiconductor devices and a number of substrates to be used for production of the semiconductor devices;

an obtaining procedure causing the computer to obtain coordinates of semiconductor devices arrangeable on the substrate, based on the exposure data; and

a layout determining procedure causing the computer to determine the layout of the semiconductor devices to be created on the substrate, based on the exposure data, the number of semiconductor devices and the coordinates of the semiconductor devices,

wherein said number determining procedure causes the computer to calculate the number of semiconductor devices to be created on one substrate, based on a time required for exposure per one semiconductor device, an exposure time per one layer of each semiconductor device, a total number of shots per one semiconductor device, and an exposure time per one shot.

14. The computer-readable program as claimed in claim 13 , wherein said layout determining procedure causes the computer to arrange the semiconductor devices to be created on the substrate with priority starting from a central portion on the substrate.

15. The computer-readable program as claimed in claim 13 , wherein said layout determining procedure causes the computer to arrange dummy patterns in a periphery of the semiconductor devices to be created on the substrate.

16. A computer-readable program for causing a computer to determine a layout of semiconductor devices that are to be created on a substrate by carrying out an exposure process, said computer-readable program comprising:

a number determining procedure causing the computer to determine a number of semiconductor devices to be created on one substrate, based on exposure data of the semiconductor devices, a time limit of delivery of the semiconductor devices and a number of substrates to be used for production of the semiconductor devices;

an obtaining procedure causing the computer to obtain coordinates of semiconductor devices arrangeable on the substrate, based on the exposure data; and

a layout determining procedure causing the computer to determine the layout of the semiconductor devices to be created on the substrate, based on the exposure data, the number of semiconductor devices and the coordinates of the semiconductor devices,

wherein said number determining procedure causes the computer to calculate the number of semiconductor devices to be created on one substrate, based on a number of shots per one layer of each semiconductor device, a number of layers of each semiconductor device, a total number of shots per one semiconductor device, and a yield of the semiconductor devices.

17. The computer-readable program as claimed in claim 16 , wherein said layout determining procedure causes the computer to arrange the semiconductor devices to be created on the substrate with priority starting from a central portion on the substrate.

18. The computer-readable program as claimed in claim 16 , wherein said layout determining procedure causes the computer to arrange dummy patterns in a periphery of the semiconductor devices to be created on the substrate.

19. A computer-readable program for causing a computer to manufacture semiconductor devices, said computer-readable program comprising:

a number determining procedure causing the computer to determine a number of semiconductor devices to be created on one substrate, based on exposure data of semiconductor devices, time limit of delivery of the semiconductor devices and a number of substrates used for production of the semiconductor devices;

an obtaining procedure causing the computer to obtain coordinates of semiconductor devices arrangeable on the substrate, based on the exposure data;

a layout determining procedure causing the computer to determine a layout of the semiconductor devices to be created on the substrate, based on the exposure data, the number of semiconductor devices and the coordinates of the semiconductor devices; and

an exposing procedure causing the computer to expose patterns of the exposure data on the substrate, based on the layout

wherein said number determining procedure causes the computer to calculate the number of semiconductor devices to be created on one substrate, based on a time required for exposure per one semiconductor device, an exposure time per one layer of each semiconductor device, a total number of shots per one semiconductor device, and an exposure time per one shot.

20. The computer-readable program as claimed in claim 19 , wherein said layout determining procedure causes the computer to arrange the semiconductor devices to be created on the substrate with priority starting from a central portion on the substrate.

21. The computer-readable program as claimed in claim 19 , wherein said layout determining procedure causes the computer to arrange dummy patterns in a periphery of the semiconductor devices to be created on the substrate.

22. A computer-readable program for causing a computer to manufacture semiconductor devices, said computer-readable program comprising:

a number determining procedure causing the computer to determine a number of semiconductor devices to be created on one substrate, based on exposure data of semiconductor devices, time limit of delivery of the semiconductor devices and a number of substrates used for production of the semiconductor devices;

an obtaining procedure causing the computer to obtain coordinates of semiconductor devices arrangeable on the substrate, based on the exposure data;

a layout determining procedure causing the computer to determine a layout of the semiconductor devices to be created on the substrate, based on the exposure data, the number of semiconductor devices and the coordinates of the semiconductor devices; and

an exposing procedure causing the computer to expose patterns of the exposure data on the substrate, based on the layout,

wherein said number determining procedure causes the computer to calculate the number of semiconductor devices to be created on one substrate, based on a number of shots per one layer of each semiconductor device, a number of layers of each semiconductor device, a total number of shots per one semiconductor device, and a yield of the semiconductor devices.

23. The computer-readable program as claimed in claim 22 , wherein said layout determining procedure causes the computer to arrange the semiconductor devices to be created on the substrate with priority starting from a central portion on the substrate.

24. The computer-readable program as claimed in claim 22 , wherein said layout determining procedure causes the computer to arrange dummy patterns in a periphery of the semiconductor devices to be created on the substrate.

Assignments (4)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
CHANGE OF NAME Recorded Jul 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024794/0500 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021985/0715 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2006
From: HIROSHI, TAKITA; MARUYAMA, TAKASHI
To: FUJITSU LIMITED
Reel/Frame 018242/0643 →
Priority Claims (1)
JP 2006-080576 · Mar 23, 2006 · national
Continuity (1)
Related Publication 20070226672A1 · Sep 27, 2007