IP Library Granted Patent US 7,589,371
Granted Patent B2
US 7,589,371 · App. 11/513,693 · Granted Sep 15, 2009

Semiconductor device and fabrication method therefor

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Quick Facts
Patent No.
US 7,589,371
App. No.
11/513,693
Granted
Sep 15, 2009
Kind
B2
Abstract

The present invention provides semiconductor device and a fabrication method therefor. The semiconductor device includes trenches ( 11 ) formed in a semiconductor substrate ( 10 ), first ONO films ( 18 ) provided on both side surfaces of the trenches, and first word lines ( 22 ) provided on side surfaces of the first ONO films ( 18 ) and running in a length direction of the trenches ( 11 ). According to the present invention, it is possible to provide a semiconductor device and a fabrication method therefor, in which higher memory capacity can be achieved.

Claims (42)

1. A semiconductor device comprising:

trenches formed in a semiconductor substrate;

first ONO films provided on both side surfaces of the trenches;

first word lines provided on side surfaces of the first ONO films and running in a length direction of the trenches wherein portions of the first word lines that are provided on respective side surfaces of the first ONO films are disposed parallel to the respective side surfaces of the first ONO films and are wholly separated in the trenches by a space that is parallel with a bottom of the trenches;

a second ONO film provided on the semiconductor substrate between the trenches; and

a second word line provided on the second ONO film, running in the length direction of the trenches, and electrically isolated from the first word lines.

2. The semiconductor device as claimed in claim 1 , further comprising bit lines provided in the semiconductor substrate and running in a width direction of the trenches.

3. The semiconductor device as claimed in claim 1 , wherein each of the first ONO films and the second ONO film has a pair of charge storage regions.

4. The semiconductor device as claimed in claim 1 , wherein the first ONO films and the second ONO film have a shared trap layer.

5. The semiconductor device as claimed in claim 1 , wherein each of the first ONO films and the second ONO film has a different trap layer.

6. The semiconductor device as claimed in claim 1 , further comprising an interlayer insulation film provided above the second word line and the trenches, having first contact holes that are connected to the first word lines on top surfaces thereof and a wiring layer.

7. The semiconductor device as claimed in claim 6 , wherein each of the first contact holes is formed at a different position from the other one of the first contact holes in the length direction of the trenches.

8. The semiconductor device as claimed in claim 6 , wherein the interlayer insulation film has a second contact hole connected to the second word line; and

wherein the second contact hole is formed at a different position from the first contact holes in the length direction of the trenches.

9. The semiconductor device as claimed in claim 1 , wherein the first ONO films formed in the trenches are connected on a bottom surface of the trenches so as to form a single ONO film; and wherein the first word lines formed in the trenches form a single word line.

10. The semiconductor device as claimed in claim 1 , wherein the first word lines formed in the trenches are electrically isolated from each other.

11. The semiconductor device as claimed in claim 10 , further comprising an interlayer insulation film provided above the trenches, having first contact holes connected to the first word lines on top surfaces thereof and a wiring layer, wherein each of the first contact holes is formed at a different position from the other one of the first contact holes in the length direction of the trenches.

12. The semiconductor device as claimed in claim 1 , wherein the first ONO films formed on the side surfaces of adjacent trenches are connected on the semiconductor substrate between the adjacent trenches so as to form a single ONO film.

13. The semiconductor device as claimed in claim 1 , wherein trap layers in the first ONO films formed on the side surfaces of adjacent trenches are isolated from each other.

14. A method of fabricating a semiconductor device comprising:

forming trenches in a semiconductor substrate;

forming first ONO films on both surfaces of the trenches;

forming first word lines on a side surface of each of the first ONO films in the trenches to run in a length direction of the trenches wherein portions of the first word lines that are provided on respective side surfaces of the first ONO films are disposed parallel to the respective side surfaces of the first ONO films and are wholly separated in the trenches by a space that is parallel with the bottom of the trenches;

forming a second ONO film on the semiconductor substrate between the trenches; and

forming a second word line on the second ONO film to run in the length direction of the trenches and to be electrically isolated from the first word lines.

15. The method as claimed in claim 14 , wherein forming the first ONO films and forming the second ONO film include forming a shared trap layer of the first ONO films and the second ONO film.

16. The method as claimed in claim 14 , wherein forming the first ONO films includes forming first trap layers; and wherein forming the second ONO film includes forming a second trap layer, and forming the first trap layers is a different step from forming the second trap layer.

17. The method as claimed in claim 16 , wherein forming the first ONO films and forming the second ONO film include forming a silicon oxide film common to the first ONO films and the second ONO film.

18. The method as claimed in claim 14 , further comprising forming first contact holes in an interlayer insulation film provided on the second word line and on the trenches to be connected to top surfaces of the first word lines.

19. The method as claimed in claim 18 , wherein forming the first contact holes includes forming each of the first contact holes at a different position from the other one of the first contact holes in the length direction of the trenches.

20. The method as claimed in claim 18 , further comprising forming a second contact hole at a different position of the interlayer insulation film from the first contact holes in the length direction of the trenches, connected to the second word line.

21. The method as claimed in claim 14 , wherein forming the first word lines includes:

forming a layer to be the first word lines on the side surfaces of the first ONO films and on the second ONO film between the trenches, and

removing the layer to be the first word lines between the trenches.

22. The method as claimed in claim 21 , wherein forming the first word lines includes forming a protect layer embedded between regions of the layer to be the first word lines in the trenches.

23. The method as claimed in claim 22 , further comprising removing the protect layer.

24. The method as claimed in claim 21 , wherein removing the layer to be the first word lines provides the layer to be the first word lines to remain on the side surfaces of the first ONO films and have a same height as a top surface of the protect layer.

25. The method as claimed in claim 21 , wherein removing the layer to be the first word lines includes removing the layer to be the first word lines by polishing the layer.

26. The method as claimed in claim 14 , wherein forming the first ONO films includes forming an ONO film on the both side surfaces of each of the trenches, on bottom surfaces of the trenches, and on the semiconductor substrate between the trenches.

27. The method as claimed in claim 26 , further comprising removing a trap layer in the ONO film on the semiconductor substrate between the trenches.

28. The method as claimed in claim 14 , further comprising electrically isolating the first word lines formed in the trenches from each other.

29. The method as claimed in claim 28 , further comprising forming first contact holes in an interlayer insulation film provided on the semiconductor substrate between the trenches and on the trenches to be connected to top surfaces of the first word lines, wherein forming the first contact holes includes forming each of the first contact holes at a different position from the other one of the first contact holes in the length direction of the trenches.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2022
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES LLC
Reel/Frame 059721/0467 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036044/0122 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 16, 2007
From: HOSAKA, MASAYA; OKANISHI, MASATOMI
To: SPANSION LLC.
Reel/Frame 018794/0108 →