Patent Assignment
Reel/Frame 036044/0122
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded: 2015-07-01
Received: 2015-07-01
Pages: 153
Assignor
SPANSION, LLC
Executed: 2015-06-01
Assignee
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT, SAN JOSE, CA, 95134, UNITED STATES
Covered Applications
(51)
MEMORY DEVICE AND METHODS FOR ITS FABRICATION
App. No. 12/199,692
→
AUTOMATED LOADING/UNLOADING OF DEVICES FOR BURN-IN TESTING
App. No. 12/055,141
→
MEMORY WITH A CORE-BASED VIRTUAL GROUND AND DYNAMIC REFERENCE SENSING SCHEME
App. No. 12/017,693
→
ALGORITHM FOR CHARGE LOSS REDUCTION AND VT DISTRIBUTION IMPROVEMENT
App. No. 11/959,122
→
HETERO-STRUCTURE VARIABLE SILICON RICH NITRIDE FOR MULTIPLE LEVEL MEMORY FLASH MEMORY DEVICE
App. No. 11/957,787
→
SCAN SENSING METHOD THAT IMPROVES SENSING MARGINS
App. No. 11/957,366
→
REFERENCE-FREE SAMPLED SENSING
App. No. 11/955,802
→
METHOD AND APPARATUS FOR HIGH VOLTAGE OPERATION FOR A HIGH PERFORMANCE SEMICONDUCTOR MEMORY DEVICE
App. No. 11/950,811
→
DECODING SYSTEM CAPABLE OF REDUCING SECTOR SELECT AREA OVERHEAD FOR FLASH MEMORY
App. No. 11/935,049
→
NONVOLATILE MEMORY ARRAY ARCHITECTURE
App. No. 11/929,724
→
VOLTAGE DETECTOR CIRCUIT
App. No. 11/975,097
→
BACK-TO-BACK NPN/PNP PROTECTION DIODES
App. No. 11/855,704
→
REGULATION OF BOOST-STRAP NODE RAMP RATE USING CAPACITANCE TO COUNTER PARASITIC ELEMENTS IN CHANNEL
App. No. 11/837,976
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EFFICIENT AND SYSTEMATIC MEASUREMENT FLOW ON DRAIN VOLTAGE FOR DIFFERENT TRIMMING IN FLASH SILICON CHARACTERIZATION
App. No. 11/837,949
→
DIE OFFSET DIE TO DIE BONDING
App. No. 11/820,278
→
PROCESS FOR MAKING A RESISTIVE MEMORY CELL WITH SEPARATELY PATTERNED ELECTRODES
App. No. 11/763,510
→
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING SEMICONDUCTOR MEMORY DEVICE
App. No. 11/790,974
→
CONTROL APPARATUS, SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS, AND SOURCE VOLTAGE SUPPLY CONTROL SYSTEM
App. No. 11/723,599
→
USING IMPLANTED POLY-1 TO IMPROVE CHARGING PROTECTION IN DUAL-POLY PROCESS
App. No. 11/724,726
→
CYCLING IMPROVEMENT USING HIGHER ERASE BIAS
App. No. 11/724,711
→
SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD
App. No. 11/654,703
→
SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING THE SAME
App. No. 11/644,161
→
SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING THE SAME
App. No. 11/644,031
→
MEMORY DEVICE HAVING IMPLANTED OXIDE TO BLOCK ELECTRON DRIFT, AND METHOD OF MANUFACTURING THE SAME
App. No. 11/615,563
→
METHOD AND APPARATUS FOR ADAPTIVE MEMORY CELL OVERERASE COMPENSATION
App. No. 11/613,379
→
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
App. No. 11/636,155
→
METHOD OF PROGRAMMING MEMORY DEVICE
App. No. 11/633,845
→
NONVOLATILE SEMICONDUCTOR MEMORY HAVING VOLTAGE ADJUSTING CIRCUIT
App. No. 11/607,090
→
USING SHARED MEMORY WITH AN EXECUTE-IN-PLACE PROCESSOR AND A CO-PROCESSOR
App. No. 11/557,439
→
REGULATOR CIRCUIT
App. No. 11/589,140
→
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREFOR
App. No. 11/513,693
→
SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
App. No. 11/514,391
→
PRESCALER AND BUFFER
App. No. 11/510,720
→
SELECT TRANSISTOR USING BURIED BIT LINE FROM CORE
App. No. 11/465,701
→
SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
App. No. 11/501,449
→
SEMICONDUCTOR DEVICE AND LIQUID CRYSTAL PANEL DRIVER DEVICE
App. No. 11/487,339
→
SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREFOR
App. No. 11/478,554
→
SURGE DETECTION CIRCUIT
App. No. 11/449,701
→
APPARATUS AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
App. No. 11/441,760
→
DC-DC CONVERTER WITH HIGH PASS FILTERED CURRENT SENSING
App. No. 11/390,133
→
CONTROLLER AND CONTROL METHOD FOR DC-DC CONVERTER
App. No. 11/370,880
→
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
App. No. 11/362,317
→
SEMICONDUCTOR MEMORY DEVICE COMPRISING ONE OR MORE INJECTING BILAYER ELECTRODES
App. No. 11/227,603
→
CONTROLLER, DATA MEMORY SYSTEM, DATA REWRITING METHOD, AND COMPUTER PROGRAM PRODUCT
App. No. 11/187,650
→
VARIABLE BREAKDOWN CHARACTERISTIC DIODE
App. No. 11/087,000
→
MOS TYPE VARIABLE CAPACITANCE DEVICE
App. No. 11/047,559
→
MICROCOMPUTER CAPABLE OF MONITORING INTERNAL MEMORY
App. No. 11/036,395
→
A SEMICONDUCTOR DEVICE HAVING AN ARITHMETIC UNIT OF A RECONFIGURABLE CIRCUIT CONFIGURATION IN ACCORDANCE WITH STORED CONFIGURATION DATA AND A MEMORY STORING FIXED VALUE DATA TO BE SUPPLIED TO THE ARITHMETIC UNIT, REQUIRING NO DATA AREA FOR STORING FIXED VALUE DATA TO BE SET IN A CONFIGURATION MEMORY
App. No. 11/035,055
→
FLASH MEMORY DEVICE HAVING INCREASED OVER-ERASE CORRECTION EFFICIENCY AND ROBUSTNESS AGAINST DEVICE VARIATIONS
App. No. 10/976,760
→
SEMICONDUCTOR FORMATION METHOD THAT UTILIZES MULTIPLE ETCH STOP LAYERS
App. No. 10/934,828
→
POLYMER DIELECTRICS FOR MEMORY ELEMENT ARRAY INTERCONNECT
App. No. 10/817,467
→