IP Library Granted Patent US 7,586,371
Granted Patent B2
US 7,586,371 · App. 11/589,140 · Granted Sep 8, 2009

Regulator circuit

Assignee: Fujitsu Microelectronics Limited
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Quick Facts
Patent No.
US 7,586,371
App. No.
11/589,140
Granted
Sep 8, 2009
Kind
B2
Abstract

The present invention is contrived to adopt a differential pair type amplifier circuit comprising a differential pair constituted by a first transistor receiving an input of a first signal and by a second transistor receiving an input of a third signal generated by outputting a second signal of which the voltage level is a power supply voltage. Elements requiring a matching are two transistors constituting the differential pair for the amplifier circuit. Because of this, the elements requiring a matching can be placed close to each other regardless of a layout between the amplifier circuits.

Claims (10)

1. A regulator circuit comprising a plurality of amplifier circuit, comprising:

a load driving amplifier for supplying a load current by generating a predetermined constant power supply voltage, a replica amplifier comprising fundamentally the same as the load driving amplifier and an operational amplifier for forming a feedback circuit in association with the replica amplifier, as the plurality of amplifier circuits,

the load driving amplifier and the replica amplifier comprises a differential pair constituted by a first transistor for receiving an input of a first signal output from the operational amplifier and by a second transistor receiving an input of a third signal generated by dividing a voltage of a second signal of the power supply voltage by a resistance voltage division circuit, and

the operational amplifier generates and outputs, the first signal according to a difference of a potential between a fourth signal used as a reference and the third signal output from the replica amplifier.

2. The regulator circuit according to claim 1 , wherein

the load driving amplifier and the replica amplifier comprise a current source for making a sum of currents supplied by said differential pair constant.

3. The regulator circuit according to claim 1 , further comprising

a charging-use amplifier for charging a capacitance element connected to said load driving amplifier for stabilizing said second signal.

4. The regulator circuit according to claim 1 , wherein

said first signal is a signal of a bandgap voltage.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036044/0122 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Dec 30, 2014
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 034715/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
CHANGE OF NAME Recorded Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024982/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021977/0219 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2006
From: TACHIBANA, SUGURU; ARUGA, KENTA; KATO, TATSUO
To: FUJITSU LIMITED
Reel/Frame 018477/0047 →
Priority Claims (1)
JP 2006-170741 · Jun 20, 2006 · national
Continuity (1)
Related Publication 20080001661A1 · Jan 3, 2008