Semiconductor device and control method of the same
A semiconductor device includes: a first sector ( 12 ) having data that are all to be erased and having flash memory cells; a second sector ( 14 ) having data that are all to be retained and having flash memory cells; a sector select circuit ( 16 ) selecting a pair of sectors from among sectors during erasing the data in the first sector, said pair of sectors being the first sector and the second sector; and an SRAM array (storage) ( 30 ) retaining the data of the second sector. The present invention can provide a semiconductor device in which a reduced number of sector select circuits is used so that the area of memory cell array can be reduced and provide a method of controlling the semiconductor device.
1. A semiconductor device comprising:
a first sector having data that are all to be erased and having flash memory cells;
a second sector having data that are all to be retained and having flash memory cells;
a sector select circuit selecting a pair of sectors from among sectors during erasing the data in the first sector, said pair of sectors being the first sector and the second sector; and
a storage retaining the data of the second sector, wherein the data of the second sector is stored prior to erasing of the pair of sectors.
2. The semiconductor devices as claimed in claim 1 , further comprising a control circuit that writes data stored in the second sector into the storage, erases data in the first sector and the second sector, and writes data stored in the storage into the second sector.
3. The semiconductor device as claimed in claim 2 , further comprising:
a read circuit that reads data from the second sector for retaining the data in the storage; and
a storage write circuit that receives the data from the read circuit, and writes the data into the storage.
4. The semiconductor device as claimed in claims 2 , further comprising:
a storage read circuit that reads data from the storage for writing the data into the second sector; and
a write circuit that receives the data from the storage read circuit, and writes the data into the second sector.
5. The semiconductor device as claimed in claim 1 , wherein a storage capacity of the first sector is substantially the same as that of the second sector.
6. The semiconductor device as claimed in claim 5 , wherein the storage capacities of the first storage and the second storage are substantially the same as a storage capacity of the storage.
7. The semiconductor device as claimed in claim 1 , further comprising:
a main bit line connected to the sectors via the sector select circuit; and
a sub bit line commonly provided to the first and second sectors and connected to the non-volatile memory cells of the first and second sectors,
the sector select circuit including a select transistor that selectively making a connection of the sub bit line with the main bit line.
8. The semiconductor device as claimed in claim 1 , wherein the non-volatile memory cells are flash memory cells.
9. A method of controlling a semiconductor device comprising:
writing data stored in a second sector having flash memory cells into a storage;
erasing data in a first sector having flash memory cells and the data the second sector, wherein the erasing of data in the first sector and the second sector is performed after the writing of data in the second sector into the storage; and
writing the data stored in the storage into the second sector.
10. The method as claimed in claims 9 , wherein erasing the data includes selecting a pair of sectors from among sectors, said a pair of sectors being the first sector and the second sector.